Hybrid Circuit Timing Model Balancing Accuracy and Resources
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Solution Overview
Problem
Current timing analysis methods for integrated circuits face challenges in balancing resource requirements and accuracy when integrating multiple circuit blocks, with black box models being computationally efficient but less accurate, and unabstracted models requiring substantial resources while being accurate.
Innovation Solution
An optimized model is created by combining information from black box and interface timing models, where necessary timing arc information is used for non-critical ports and detailed information from interface models for critical ports, allowing for a balance between resource usage and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If black box models are used for timing analysis, then computational efficiency is improved and resource requirements are reduced, but measurement precision and timing analysis accuracy deteriorate
Solution Approach 1:
The patent applies local quality by differentiating the level of model abstraction based on the criticality of circuit ports. Critical ports (those on timing-sensitive paths) use detailed interface timing models with full circuit information, while non-critical ports use simplified black box models. This selective approach optimizes the balance between computational efficiency and timing analysis accuracy by concentrating detailed modeling resources where they are most needed.
2Measurement precision
If unabstracted models with complete circuit information are used, then measurement precision and timing analysis accuracy are improved, but resource requirements and computational complexity increase substantially
Solution Approach 1:
The patent segments the circuit ports into two categories: critical ports and non-critical ports. This segmentation allows the timing analysis system to apply different modeling strategies to different segments. Non-critical ports are analyzed using resource-efficient black box models, while only critical ports require the resource-intensive detailed interface timing models, thereby reducing overall computational complexity while maintaining necessary accuracy.
Solution Approach 2:
The patent implements partial action by applying detailed interface timing models only to the extent necessary for critical ports, rather than using complete detailed models for all ports. This partial application of detailed modeling provides sufficient timing analysis accuracy for critical paths while avoiding the excessive resource consumption that would result from uniformly applying detailed models to all circuit ports.
Data Source
AI summary
An aspect of the present invention provides for timing analysis when integrating multiple circuit blocks while balancing resource requirements and accuracy. In an embodiment, an optimized model for a circuit block is created by combining information provided by two different models of the same circuit block and performing timing analysis based on the optimized model. In an embodiment, the two models correspond to black box and interface timing models. In the optimized model, ports for which only timing arc information is deemed necessary are modeled using corresponding information from the black box model, while ports for which more accurate or detailed information is deemed necessary are modeled using corresponding information from the interface timing model. The optimized model enables the integration to be performed with a balance of resource requirements and accuracy.