Hybrid DC-DC Converter Flying Capacitor Voltage Balancing
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Solution Overview
Problem
Existing three-level hybrid DC-DC switching converters face challenges in balancing the voltage across the flying capacitor, leading to potential voltage overstress on power transistors due to mismatches in driving signals and parasitic capacitance effects.
Innovation Solution
A DC-DC converter circuit with a time-based feedback control system that includes a voltage-controlled oscillator and a logic circuit to manage switching phases, along with a voltage balancing circuit to sense and adjust the flying capacitor voltage, ensuring it remains balanced around a target voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage-based control techniques are used, then the control circuitry can maintain stable operation, but the silicon area occupation increases and power consumption increases
Solution Approach 1:
The patent replaces conventional voltage-based control (analog/mechanical approach) with time-based control using digital signals. The control circuit uses time events (rising/falling edges of digital signals) instead of analog voltage levels, which reduces the complexity of the control circuitry, decreases silicon area occupation, and lowers power consumption while maintaining control stability.
2Speed
If the converter switching frequency increases, then the control loop bandwidth increases, but the gain-bandwidth product requirement of the analog error amplifier increases leading to complex design and large power consumption
Solution Approach 1:
The patent substitutes the analog error amplifier with a time-based control mechanism that uses digital signal edges to determine switching timing. This eliminates the need for high gain-bandwidth product amplifiers, simplifying the controller design and reducing power consumption while allowing high switching frequencies and corresponding control loop bandwidths.
3Use of energy by moving object
If analog signals are used in scaled technology nodes, then the power supply scaling is limited, but the design complexity increases and performance degrades
Solution Approach 1:
The patent replaces analog signals with digital CMOS signals that switch between the positive supply rail (VDD) and ground (VGND). This substitution allows the circuit to fully benefit from technology node scaling, as digital signals are less sensitive to supply voltage reduction and parasitic effects, thereby reducing design complexity and improving scalability.
4Stress or pressure
If high-voltage rated power switches are used for large conversion ratios, then the input voltage handling capability increases, but the transistor conduction performance decreases and device area increases
Solution Approach 1:
The patent segments the voltage conversion function into multiple stages using a multi-phase switching architecture with intermediate voltage nodes. Instead of using a single high-voltage switch, the converter divides the voltage conversion into sequential steps across multiple switches operating at lower voltage ratings, improving overall conduction performance while maintaining high input voltage handling capability.
Solution Approach 2:
The patent employs periodic multi-phase switching operation where different switches are activated in sequence across switching phases. This periodic action allows each switch to operate within its optimal voltage and current ranges, improving conduction performance while collectively handling high input voltages through the coordinated switching sequence.
Data Source
AI summary
In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.


