Hybrid Display Substrate Layout for Low-Power TFT Integration
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Solution Overview
Problem
Current display technologies, particularly OLED and LCD, face challenges in reducing power consumption and achieving high integration of transistors, which limits the efficiency and thickness of display substrates.
Innovation Solution
A display substrate is designed with a combination of low-temperature poly-silicon transistors and oxide transistors, where the first source-drain layer includes poly-silicon active layers and oxide active layers, with connecting electrodes and gate electrodes, allowing for high integration and reduced power consumption by simultaneously forming the film layers of both types of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional LCD or OLED display technologies are used, then display functionality is achieved, but power consumption is high and transistor integration is limited
Solution Approach 1:
The patent merges LTPS and oxide semiconductor transistor technologies into a single display substrate, allowing both types of transistors to coexist and work together. The LTPS transistors provide high-speed switching while oxide transistors provide low leakage current, achieving both low power consumption and high integration without requiring separate substrates or complex additional processing steps.
Solution Approach 2:
The patent creates a universal substrate structure that can accommodate both LTPS and oxide transistor types using the same base substrate, common source-drain layer structure, and shared manufacturing processes. This multi-functional approach allows the display substrate to achieve both high-speed performance and low power consumption through different transistor types within a unified architecture.
2Speed
If LTPS TFT technology is used, then high-speed switching is achieved, but leakage current is high
Solution Approach 1:
The patent applies different transistor types to different functional areas: LTPS transistors are used where high-speed switching is critical (such as driver circuits), while oxide transistors are used where low leakage current is critical (such as pixel circuits). This local optimization allows each transistor type to excel in its designated function without compromising overall display performance.
3Object-generated harmful factors
If oxide TFT technology is used, then low leakage current is achieved, but switching speed is limited
Solution Approach 1:
The patent combines oxide transistors with LTPS transistors in the same display substrate, allowing oxide transistors to handle low-leakage functions while LTPS transistors handle high-speed functions. The interconnected structure enables signal routing between different transistor types, optimizing overall system performance.
4Reliability
If separate substrates are used for LTPS and oxide transistors, then each transistor type can be optimized, but device complexity and thickness increase
Solution Approach 1:
The patent merges both LTPS and oxide transistor fabrication processes onto a single substrate, using common base substrate preparation, shared source-drain layer formation, and integrated interconnection structures. This reduces the number of substrates from two to one, simplifying the overall device structure while maintaining the performance benefits of both transistor types.
Data Source
AI summary
Disclosed in embodiments of the present disclosure are a display substrate, a display panel, and a method for preparing the display substrate. The display substrate includes: a base substrate; a first source-drain layer, including first source-drain electrodes in the first area, and a first gate located in the second area; a first active layer, including a poly-silicon active layer located in the first area; a first gate layer, including a second gate and a connecting electrode located in the first area; a second active layer, including an oxide active layer located in the second area; a second gate layer, including a third gate located in the second area; and a second source-drain layer, including a second source-drain electrodes in the second area, and a lapping electrode located in the first area.