Hybrid Fin FET Layout to Prevent S/D Bridging and Gate Fill Loss

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Solution Overview

Problem

In advanced technology nodes, the formation of semiconductor devices faces challenges in dimension scaling due to the bridging of source/drain epitaxial regions and metal gate gap fill degradation caused by small spacing between channel regions and hybrid fins, leading to manufacturing complexity and yield issues.

Innovation Solution

The introduction of hybrid fins, which are formed between stacks of channel layers with larger spacing and extend through both the metal gate region and source/drain epitaxial regions, or between the source/drain epitaxial regions but not in the metal gate regions, to prevent merging and improve yield by increasing space for metal gate formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dimension scaling is performed to increase functional density, then production efficiency is improved and costs are lowered, but manufacturing complexity increases and bridging of source/drain epitaxial regions occurs

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces hybrid fins that segment the device structure into distinct regions: channel regions, hybrid fin regions, and source/drain epitaxial regions. These hybrid fins act as physical separators that prevent unwanted bridging between source/drain regions while maintaining the scaled-down dimensions needed for high functional density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hybrid fins serve as intermediary structures between the channel regions and source/drain epitaxial regions. They provide a buffer zone that prevents direct contact and potential bridging between source/drain regions, thereby simplifying the manufacturing process by eliminating the need for complex bridging prevention techniques.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If spacing between channel regions and hybrid fins is reduced to increase functional density, then more devices fit per chip area, but metal gate gap fill degradation occurs

Engineering Contradiction:
Improvefunctional densityVSAvoidmetal gate gap fill quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating hybrid fins with specific material compositions and geometries in targeted locations. The hybrid fins have tailored properties that differ from regular fins, providing localized structural support and spacing maintenance in critical areas where metal gate gap fill occurs, thereby ensuring high-quality gap fill even at reduced spacing.

Inventive Principle:
Principle #3Local quality

3Reliability

If hybrid fins are introduced to prevent bridging of source/drain epitaxial regions, then yield is improved, but device complexity increases

Engineering Contradiction:
Improvedevice yieldVSAvoidfin structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple structures into the hybrid fins. These fins simultaneously serve as: (1) physical barriers to prevent source/drain bridging, (2) structural supports for metal gate formation, (3) spacing maintainers between channel regions, and (4) integral parts of the transistor active structures. This consolidation reduces overall device complexity compared to using separate components for each function.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250366062A1Field effect transistor with multiple hybrid fin structure and method
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250366062A1 patent drawing
  • US20250366062A1 patent drawing
  • US20250366062A1 patent drawing

AI summary

A device includes a substrate, first and second gate structures, first and second hybrid fins, and first and second sidewalls. The first gate structure is over and surrounds a first vertical stack of nanostructures. The second gate structure is over and surrounds a second vertical stack of nanostructures. The second gate structure and the first gate structure extend along a first direction, and are laterally separated from each other in a second direction, the second direction being substantially perpendicular to the first direction. The first hybrid fin extends through and under the first gate structure and the second gate structure, the extending being along the second direction. The second hybrid fin is between the first gate structure and the second gate structure. The second hybrid fin has: a first sidewall that abuts the first gate structure; and a second sidewall that abuts the second gate structure.