Hybrid Logic Interconnects for Bypassing and Augmenting Hard Blocks
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Solution Overview
Problem
Hybrid devices combining hard logic and soft logic face limitations in flexibility and efficiency, as hard logic blocks often operate serially and cannot be augmented with soft logic features, requiring customers to choose between speed and customization.
Innovation Solution
Configurable interconnects between hard logic and soft logic elements allow for signal routing, enabling hard logic blocks to be bypassed or augmented by soft logic, and allowing soft logic to provide additional signals to hard logic blocks, thereby enhancing processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If hard logic blocks are used to implement standard functional blocks, then speed and power efficiency are improved, but flexibility and adaptability deteriorate
Solution Approach 1:
The patent merges hard logic blocks (for speed-critical functions) and soft logic blocks (for flexible functions) into a unified hybrid device architecture. The interconnect fabric integrates both logic types, allowing them to work together as a single system, thus achieving both high speed and flexibility simultaneously.
Solution Approach 2:
The patent introduces dynamically reconfigurable interconnects that can change their routing behavior based on operational needs. The multiplexers and routing logic allow the system to adapt its data paths dynamically, enabling flexibility without sacrificing the speed of hard logic blocks when not needed.
2Adaptability or versatility
If soft logic elements are used for customized functionality, then flexibility is improved, but processing speed and power efficiency deteriorate
Solution Approach 1:
The patent segments the processing functions into distinct hard logic blocks and soft logic blocks. Speed-critical functions are assigned to hard logic blocks that operate at high speed, while customization requirements are handled by soft logic blocks. The interconnect fabric efficiently routes data between these segments, minimizing the speed penalty of using soft logic.
Solution Approach 2:
The interconnect fabric acts as an intermediary between hard logic and soft logic blocks. It provides optimized data paths that allow soft logic blocks to communicate efficiently with hard logic blocks, reducing the speed overhead associated with using programmable logic for customized functions.
3Device complexity
If hard logic blocks operate in serial fashion, then device complexity is reduced, but productivity and throughput deteriorate
Solution Approach 1:
The patent transitions from one-dimensional serial processing to two-dimensional parallel processing by introducing multiple hard logic blocks that can operate simultaneously. The interconnect fabric provides multiple independent data paths, allowing data to flow through different blocks in parallel, thus increasing throughput without significantly increasing complexity.
Solution Approach 2:
The interconnect fabric is designed as a universal routing structure that can efficiently handle data between any combination of hard logic and soft logic blocks. This multi-functional interconnect system supports both serial and parallel operation modes, allowing the device to optimize throughput for different workloads without requiring complex dedicated routing for each scenario.
4Reliability
If hard logic blocks operate in isolation, then reliability is improved, but adaptability and functionality deteriorate
Solution Approach 1:
The interconnect fabric serves as an intermediary that connects isolated hard logic blocks while preserving their operational independence. Each hard logic block maintains its own stable operation, but the interconnect fabric enables coordinated functionality by routing data between blocks and allowing soft logic to augment hard logic operations when needed.
Solution Approach 2:
The patent introduces dynamic reconfigurability to the previously static isolated hard logic blocks. Through the interconnect fabric and multiplexers, the system can dynamically change which blocks are active and how they are connected, allowing isolated blocks to work together in different configurations based on operational requirements, thus enhancing functionality without compromising reliability.
Data Source
AI summary
Systems and methods are disclosed for interfacing between hard logic elements and soft logic elements implemented on an integrated device. In particular, a configurable interface is provided that includes interconnects between hard logic and soft logic, which enable signals to be selectively routed between the inputs and outputs of hard logic blocks and soft logic modules. The interconnects allow for certain hard logic blocks to be bypassed in favor of soft logic functionality. Moreover, the interconnects allow soft logic to augment the processing of hard logic blocks, e.g., by providing additional signals to the hard logic block.