Single-Die Hybrid Memory Layout for Speed and Data Retention
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Solution Overview
Problem
Existing memory devices face limitations in performance due to the need to choose between volatile and non-volatile memory types, which often results in reduced performance in one or more metrics, such as latency, power consumption, and area usage, especially in power- and space-constrained devices like mobile devices.
Innovation Solution
A hybrid memory device is developed that combines volatile and non-volatile memory cells, such as DRAM and FeRAM, on a single substrate, allowing for fast read and write operations while providing long-term storage, reducing latency, power requirements, and area usage by integrating both memory types on a single die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If volatile memory (DRAM) is used, then read and write speeds are improved, but data retention without power is worsened
Solution Approach 1:
The patent segments the memory system into two distinct types of memory cells: volatile memory cells (DRAM) for fast data access and non-volatile memory cells (FeRAM) for data retention. Each cell type has dedicated read and write circuits that are selectively activated based on the desired operation, allowing the system to achieve both fast access speeds and data retention capabilities without compromising either function.
2Duration of action of stationary object
If non-volatile memory (FeRAM) is used, then data retention without power is improved, but read and write speeds are worsened
Solution Approach 1:
The patent segments the memory system into two distinct types of memory cells: volatile memory cells (DRAM) for fast data access and non-volatile memory cells (FeRAM) for data retention. Each cell type has dedicated read and write circuits that are selectively activated based on the desired operation, allowing the system to achieve both fast access speeds and data retention capabilities without compromising either function.
3Adaptability or versatility
If separate memory dies are used for volatile and non-volatile memory, then functionality is improved, but device area is worsened
Solution Approach 1:
The patent merges both volatile and non-volatile memory cells onto a single substrate, integrating two previously separate memory systems into one unified device. This consolidation eliminates the need for separate memory dies while maintaining the distinct functional characteristics of each memory type, thereby reducing the overall device area without sacrificing functionality.
4Productivity
If additional components are added to support both memory types, then performance is improved, but device complexity is worsened
Solution Approach 1:
The patent segments the memory system into two distinct types of memory cells: volatile memory cells (DRAM) for fast data access and non-volatile memory cells (FeRAM) for data retention. Each cell type has dedicated read and write circuits that are selectively activated based on the desired operation, allowing the system to achieve both fast access speeds and data retention capabilities without compromising either function.
Solution Approach 2:
The patent implements control circuitry that can selectively activate read and write operations for both volatile and non-volatile memory cells through a unified interface. This multi-functional control mechanism allows the system to handle different memory types with a single set of control logic, reducing the need for additional separate components and simplifying the overall device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid memory device improves performance by reducing latency and power consumption, enhancing endurance, and optimizing area usage, making it suitable for power- and space-constrained devices without the need for separate memory dies or additional components.
Implementation Method 1
a first memory cell (105-b) that comprises a ferroelectric capacitor
Implementation Method 2
a second memory cell (105-c) that comprises a paraelectric capacitor
Data Source
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AI summary
Methods, systems, and devices for a hybrid memory device are described. The hybrid memory device may include volatile and non-volatile memory cells on a single substrate, or die. The non-volatile memory cells may have ferroelectric capacitors and the volatile memory cells may have paraelectric or linear dielectric capacitors for their respective logic storage components. In some examples, the volatile memory cells may be used as a cache for the non-volatile memory cells. Or the non-volatile memory cells may be used as a back-up for the volatile memory cells. By placing both types of cells on a single die, rather than separate dies, various performance metrics may be improved, including those related to power consumption and operation speed.