Hybrid Memory Stack With Through-Stack Capacitor for Faster Fabrication
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Solution Overview
Problem
Current semiconductor devices require separate fabrication processes for volatile and non-volatile memories, leading to increased manufacturing costs and reduced operating speeds.
Innovation Solution
A hybrid memory design that integrates both volatile and non-volatile memories on a single substrate, featuring a capacitor penetrating through an alternating stack of insulation layers and horizontal word lines, and a vertical channel structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate fabrication processes are used for volatile and non-volatile memories, then manufacturing precision can be maintained for each type, but manufacturing cost increases and operating speed decreases
Solution Approach 1:
The patent combines volatile memory (DRAM) and non-volatile memory (NAND) fabrication processes into a single integrated process. The alternating stack structure with oxide-nitride-oxide layers serves dual purposes: forming capacitors for DRAM cells and forming memory layers for NAND cells. This merging eliminates the need for separate fabrication lines and reduces overall manufacturing complexity while maintaining cost-effectiveness.
Solution Approach 2:
The oxide-nitride-oxide alternating stack structure performs multiple functions simultaneously. It provides the dielectric layers for DRAM capacitors and the memory tunnel barrier and storage layer for NAND memory cells. The same structural framework supports both volatile and non-volatile memory functions, reducing the number of separate components and simplifying the fabrication process.
2Speed
If separate fabrication processes are used for volatile and non-volatile memories, then each memory type can be optimized independently, but operating speed is reduced due to increased manufacturing complexity
Solution Approach 1:
The patent merges DRAM and NAND fabrication into a unified process flow. The alternating stack is formed once and then selectively processed to create both capacitor structures and memory cell structures. This single-pass approach reduces manufacturing complexity and enables faster production cycles, directly improving operating speed.
Solution Approach 2:
While the overall structure is unified, the patent uses segmentation to differentiate functional regions. The opening structures are selectively positioned and sized to create distinct capacitor regions and memory cell regions from the same alternating stack. This allows independent optimization of each memory type's performance while maintaining a unified fabrication process.
3Reliability
If a high-aspect-ratio capacitor is used, then sensing margin is improved, but manufacturing precision requirements increase
Solution Approach 1:
The self-aligned fabrication process uses the opening structure itself as the alignment reference for capacitor formation. The channel structure automatically defines the capacitor position and dimensions, eliminating the need for separate alignment steps. This self-service approach achieves high precision without requiring additional manufacturing complexity.
Solution Approach 2:
The opening structure is formed first, establishing the precise geometric framework before capacitor materials are deposited. This preliminary action of creating the structural template ensures that subsequent capacitor formation automatically achieves the required precision and high aspect ratio, as the opening walls serve as natural boundaries.
Data Source
AI summary
Embodiments of the present invention provide a hybrid memory and a hybrid memory manufacturing method including both a volatile memory and a nonvolatile memory on a single substrate so as to increase an operation speed of a semiconductor device and reduce manufacturing cost. A hybrid memory includes: a substrate; a non-volatile memory including an alternating stack in which a plurality of insulation layers and a plurality of horizontal word lines are alternately stacked on the substrate; and a volatile memory including a capacitor, the capacitor penetrating through the alternating stack.