Hybrid Memory Cells Combining Transistor and Resistive Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memories, such as SRAM and DRAM, lose stored data when powered off, while non-volatile memories like FeRAM offer fast write/read speeds but have limitations in data retention and integration density.
Innovation Solution
A hybrid memory cell combining a transistor-type memory and a resistive-type memory, utilizing a ferroelectric material for polarization-based data storage and a resistive memory layer for additional data retention, allowing independent programming and reading of both types within the same memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If volatile memories (SRAM/DRAM) are used, then fast access speed is achieved, but data retention when powered off deteriorates
Solution Approach 1:
The patent combines volatile memory (DRAM) and non-volatile memory (FeRAM) into a single hybrid memory cell structure. The DRAM component provides fast access speed while the FeRAM component ensures data retention when powered off, resolving the contradiction between speed and reliability by merging both memory types in one cell.
Solution Approach 2:
The hybrid memory cell uses composite material structures including ferroelectric layers and resistive memory materials combined with standard DRAM components. This composite approach enables the cell to exhibit both volatile memory characteristics (fast access) and non-volatile memory characteristics (data retention).
2Reliability
If non-volatile memories (FeRAM) are used, then data retention is improved, but integration density deteriorates
Solution Approach 1:
By merging FeRAM and DRAM functionalities into a single hybrid memory cell, the patent achieves non-volatile data retention without requiring separate non-volatile memory arrays, thus maintaining high integration density while improving data retention.
Solution Approach 2:
The hybrid memory cell structure serves multiple functions simultaneously: it provides both volatile and non-volatile storage capabilities within a single cell footprint, enabling the memory to function as both fast storage and retention storage without requiring additional area.
3Reliability
If hybrid memory structure is implemented, then data retention and integration density are improved, but device complexity increases
Solution Approach 1:
The hybrid memory cell is segmented into distinct functional regions: a DRAM portion with transistor and capacitor, and a FeRAM portion with ferroelectric tunnel junction. This segmentation allows each component to be optimized independently while maintaining overall cell integration, managing complexity through functional decomposition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances data retention and integration density by leveraging the fast access times of transistor-type memories with the static data storage capabilities of resistive-type memories, reducing erroneous readings and improving overall memory efficiency.
Implementation Method 1
utilizing a ferroelectric material for polarization-based data storage
Implementation Method 2
a resistive memory layer for additional data retention
Data Source
AI summary
A memory array includes hybrid memory cells, wherein each hybrid memory cell includes a transistor-type memory including a memory film extending on a gate electrode; a channel layer extending on the memory film; a first source/drain electrode extending on the channel layer; and a second source/drain electrode extending along the channel layer; and a resistive-type memory including a resistive memory layer, wherein the resistive memory layer extends between the second source/drain electrode and the channel layer.