Hybrid Reticle Stitching for Wafer-Scale Compute Bandwidth
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Solution Overview
Problem
Conventional approaches to integrating memory and xPUs on a single electrically connected wafer-scale matrix are constrained by bandwidth, power, and scalability limitations, limiting the number of compute units and shared memory resources.
Innovation Solution
A multi-reticle device employing a hybrid interconnect scheme combining electrical and optical stitching, using electrical interconnects for short-reach connections and optical links for long-reach connections, with an intermediate connection layer and electro-optical interposer to enhance scalability and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional electrical interconnects are used to integrate memory and xPUs on a wafer-scale matrix, then electrical connectivity is achieved, but bandwidth and scalability are limited
Solution Approach 1:
The patent combines electrical and optical interconnect technologies into a hybrid system. Electrical interconnects handle short-reach connections between adjacent reticles, while optical interconnects handle long-reach connections across the wafer-scale matrix, merging the advantages of both technologies to achieve high bandwidth and scalability
Solution Approach 2:
The patent introduces an intermediate connection layer with electro-optical conversion components that act as mediators between electrical circuits and optical waveguides. This intermediary layer enables seamless integration of electrical and optical domains, allowing electrical signals to be converted to optical signals for long-distance transmission and vice versa
2Productivity
If the number of compute units and shared memory resources is increased on a wafer-scale matrix, then compute density is improved, but electrical interconnect bandwidth becomes insufficient
Solution Approach 1:
The patent replaces conventional electrical interconnects with optical interconnects for long-reach connections across the wafer-scale matrix. This substitution of the transmission medium (from electrical to optical) enables significantly higher bandwidth to support increased compute density without being constrained by electrical interconnect limitations
3Power
If electrical interconnects are used for all connections, then system complexity is reduced, but interconnect bandwidth and scalability are constrained
Solution Approach 1:
The patent applies different interconnect technologies to different spatial regions and connection types: electrical interconnects are used for short-reach connections between adjacent reticles where they remain efficient, while optical interconnects are used for long-reach connections across the wafer-scale matrix. This localized application of appropriate technologies optimizes bandwidth without unnecessarily increasing overall system complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides significantly greater scalability in compute and memory density and overall interconnect bandwidth, exceeding the limitations of conventional electrical interconnects alone.
Implementation Method 1
the electro-optical interposer optically connects the first EIC to a third EIC of the plurality of EICs
Data Source
AI summary
Hybrid interconnect schemes that combine both electrical and optical stitching are described. Electrical stitching is well-suited for short-reach, high-bandwidth connections between adjacent or closely spaced units. On the other hand, optical stitching is well-suited for long-reach, low-loss connections between non-adjacent units. By leveraging the complementary nature of electrical and optical stitching, a multi-reticle device may be constructed that provides substantially greater scalability in terms of compute and memory density and overall interconnect bandwidth than is achievable using conventional approaches. An intermediate connection layer is configured to electrically connect electrical integrated circuits (EIC) of the plurality of EICs that are within a cutoff range of one another. An electro-optical interposer is configured to optically connect EICs of the plurality of EICs that are outside the cutoff range of one another.