Hybrid SOI-Bulk Semiconductor Structure for RF and Logic Integration

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Solution Overview

Problem

The increasing complexity in manufacturing semiconductor devices with high device density leads to issues such as degraded electrical performance and yield loss, particularly when integrating radio frequency devices with digital or analog devices on different substrates like silicon-on-insulator (SOI) and bulk silicon substrates.

Innovation Solution

A hybrid substrate approach is developed, combining bulk silicon regions and SOI regions on a single substrate, which reduces the need for extra packaging and routing wires, allowing for improved device performance by forming radio frequency devices on SOI regions and digital/analog devices on bulk silicon regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If radio frequency devices and digital/analog devices are integrated on different substrates (SOI and bulk silicon), then device functionality and performance are improved, but manufacturing complexity increases and yield loss increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines SOI and bulk silicon substrates into a single hybrid substrate structure, allowing radio frequency devices and digital/analog devices to be integrated on the same substrate. This merging approach eliminates the need for separate substrate processing and reduces manufacturing complexity while maintaining device functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate is segmented into different regions with different substrate types (SOI regions and bulk silicon regions) to support different device types. This segmentation allows each device type to be optimized for its specific requirements while being manufactured together on a single substrate.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If extra packaging and routing wires are used to integrate different substrate types, then device functionality is achieved, but performance degrades and manufacturing cost increases

Engineering Contradiction:
Improvedevice integrationVSAvoidelectrical performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent merges different substrate types into a single hybrid substrate, eliminating the need for extra packaging and routing wires that would be required to connect separate substrates. This direct integration improves electrical performance by reducing parasitic inductance and resistance while lowering manufacturing costs.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances device performance by reducing performance and cost losses associated with extra packaging and routing wires, while improving the integration of different substrate types, leading to more efficient semiconductor manufacturing.

Implementation Method 1

growing an initial epitaxial layer in the trench

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12159873B2Semiconductor structure and manufacturing method thereof
Publication Date: 2024.12.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12159873B2 patent drawing
  • US12159873B2 patent drawing
  • US12159873B2 patent drawing

AI summary

A method includes: receiving a composite substrate including a first region and a second region, the composite substrate comprising a semiconductor substrate and an insulator layer over the semiconductor substrate; bonding a silicon layer to the composite substrate; depositing a capping layer over the silicon layer; forming a trench through the capping layer, the silicon layer and the insulator layer, the trench exposing a surface of the semiconductor substrate in the first region; growing an initial epitaxial layer in the trench; removing the capping layer to form an epitaxial layer from the silicon layer and the initial epitaxial layer; forming a transistor layer over the epitaxial layer, the transistor layer including a first transistor and a second transistor in the first region and the second region, respectively; and forming an interconnect layer over the transistor layer and electrically coupling the first transistor to the second transistor.