Hybrid Storage Block Layout for Integrated OD-ECC Memory

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Solution Overview

Problem

The challenge of miniaturizing storage devices while maintaining efficient data storage and error correction capabilities is hindered by the need for separate storage regions and drive modules, leading to increased layout area and prolonged data storage response times.

Innovation Solution

A storage device design that integrates hybrid storage blocks for data and on-die error correcting code (OD-ECC) and system error correcting code, with drive modules and amplification modules strategically arranged to reduce the number of storage regions and modules, and incorporates redundancy storage blocks to enhance fault tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate storage regions are used for data and error correcting codes, then data integrity is improved, but layout area increases

Engineering Contradiction:
Improvedata integrityVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines data storage and error correcting code storage into a single hybrid storage block. The hybrid storage block contains both data bits and error correcting code bits, eliminating the need for separate storage regions. This merging reduces the overall layout area while maintaining the capability to store both data and error correction information, directly resolving the contradiction between data integrity and layout area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The hybrid storage block serves multiple functions simultaneously: it stores data, stores error correcting codes, and enables error correction operations. By making the storage block universal and multi-functional, the patent eliminates the need for dedicated separate regions for different storage purposes, thereby reducing layout area while preserving data integrity through integrated error correction capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple drive modules are distributed across storage regions, then data access efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvedata access efficiencyVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple drive modules into a single drive module that serves the entire hybrid storage block. Instead of having separate drive modules for data and error correcting codes, one drive module handles all read/write operations for both data and ECC bits. This reduces device complexity by eliminating redundant drive module instances while maintaining data access efficiency through unified control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The drive module is designed as a universal component that can access and operate on any portion of the hybrid storage block, whether data or error correcting codes. This multi-functional drive module reduces the total number of drive modules needed, thereby reducing device complexity, while still providing efficient data access through its ability to handle all storage operations centrally.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If separate amplification modules are used for data and error correcting codes, then signal amplification accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesignal amplification accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple amplification modules into a single amplification module that amplifies signals from the entire hybrid storage block. Instead of having separate amplification paths for data and error correcting codes, the unified amplification module handles all signal amplification needs. This reduces device complexity by eliminating redundant amplification module instances while maintaining signal amplification accuracy through centralized signal processing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The amplification module is designed as a universal component that amplifies signals regardless of whether they originate from data bits or error correcting code bits. This multi-functional approach reduces the total number of amplification modules needed, thereby reducing device complexity, while preserving signal amplification accuracy through its ability to uniformly process all signals from the hybrid storage block.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If hybrid storage blocks are arranged side by side in word line direction, then storage density is improved, but data storage response time increases

Engineering Contradiction:
Improvestorage densityVSAvoiddata storage response time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments the hybrid storage block into distinct data bit portions and error correcting code bit portions within the same block. This segmentation allows for optimized access patterns where data bits can be accessed quickly while error correcting codes are available when needed. The side-by-side arrangement of hybrid storage blocks in the word line direction maintains high storage density while the internal segmentation enables efficient response times by organizing related data and ECC bits together for coordinated access.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12567448B2Storage device
Publication Date: 2026.03.03 CHANGXIN MEMORY TECH INC
  • US12567448B2 patent drawing
  • US12567448B2 patent drawing
  • US12567448B2 patent drawing

AI summary

The present disclosure provides a storage device, including: at least one first storage region, at least one drive module, and at least one amplification module. The drive module is arranged on both sides of each of the first storage regions in a word line direction, and the amplification module is arranged on both sides of each of the first storage regions in a bit line direction. Each of the first storage regions includes at least one hybrid storage block arranged side by side in the word line direction and configured to store data and an on die error correcting code (OD-ECC).