Hydrogen Blocking Layer for 3D Memory Devices
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Solution Overview
Problem
In 3D memory devices, hydrogen outgassing during the pad-out annealing process degrades the electrical performance due to the formation of dangling bonds, which limits the efficiency of memory cell arrays.
Innovation Solution
Incorporating hydrogen blocking layers, particularly high-k dielectric materials like aluminum oxide, to prevent hydrogen outgassing from logic process-compatible devices during the fabrication of 3D memory devices, ensuring that the pad-out interconnect layer is shielded and the metal interconnects are protected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pad-out annealing process is performed to improve electrical performance, then metal interconnect reliability is improved, but hydrogen outgassing causes dangling bond formation that degrades device performance
Solution Approach 1:
A hydrogen blocking layer is introduced as an intermediary component between the logic process-compatible devices and the pad-out interconnect layer. This layer selectively blocks hydrogen outgassing from reaching the metal interconnects during pad-out annealing, while allowing the annealing process to proceed for improving metal interconnect reliability. The hydrogen blocking layer acts as a mediator that prevents the harmful interaction between hydrogen and metal interconnects.
Solution Approach 2:
The harmful hydrogen outgassing is extracted or removed from the system by introducing a hydrogen blocking layer that captures and contains the hydrogen within the logic process-compatible devices. This prevents hydrogen from migrating to the metal interconnects during the pad-out annealing process, effectively taking out the harmful element from the interaction path.
2Quantity of substance
If 3D memory architecture is implemented to increase memory density, then memory capacity is improved, but fabrication complexity increases due to integration of logic process-compatible devices
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming NAND memory strings on a first substrate, forming logic process-compatible devices on a second substrate, and then bonding the substrates together. This segmentation allows each component to be fabricated independently using optimized processes, reducing overall fabrication complexity while achieving high memory capacity through 3D integration.
Solution Approach 2:
The patent transitions from planar 2D memory architecture to 3D vertical architecture by stacking memory and logic components in multiple layers. Memory strings extend vertically through the memory stack, and logic devices are positioned above the memory array, utilizing the third dimension to increase memory capacity without proportionally increasing fabrication complexity.
3Adaptability or versatility
If logic process-compatible devices are integrated above memory strings to improve functionality, then device capability is improved, but hydrogen outgassing from logic devices degrades memory performance
Solution Approach 1:
The hydrogen blocking layer serves as a protective intermediary positioned between the logic process-compatible devices and the memory structures. It allows the logic devices to be integrated for enhanced functionality while blocking the harmful hydrogen outgassing from affecting the memory performance, thus enabling both improved device capability and maintained memory reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of hydrogen blocking layers effectively suppresses the formation of dangling bonds, enhancing the electrical performance and efficiency of 3D memory devices by preventing hydrogen outgassing, thereby improving memory cell array efficiency.
Implementation Method 1
a hydrogen blocking layer vertically between the semiconductor layer and the pad-out interconnect layer and configured to block outgassing of hydrogen
Implementation Method 2
hydrogen outgassing during the pad-out annealing process degrades the electrical performance
Data Source
AI summary
Embodiments of three-dimensional (3D) memory devices have a blocking layer and fabrication methods thereof are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including interleaved conductive layers and dielectric layers above the substrate, an array of NAND memory strings each extending vertically through the memory stack, a plurality of logic devices above the array of NAND memory strings, a semiconductor layer above and in contact with the logic devices, a pad-out interconnect layer above the semiconductor layer, and a blocking layer vertically between the semiconductor layer and the pad-out interconnect layer and configured to block outgassing of hydrogen.