Hydrogen-Implanted Semiconductor Substrates for Vertical DRAM Stacking
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Solution Overview
Problem
Current semiconductor technologies face challenges in increasing memory capacity without reducing processing dimensions, particularly in the vertical stacking of access transistors and storage capacitors in DRAMs, which is technically difficult and costly.
Innovation Solution
The method involves forming isolation trenches and hydrogen-implanted layers in semiconductor substrates, followed by smart cut techniques and wafer bonding to create vertically stacked memory cells and peripheral circuits, reducing the planar area occupied by memory cells and peripheral circuits, thereby decreasing chip area and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If processing dimensions are reduced to increase memory capacity, then memory capacity increases, but manufacturing precision and device reliability deteriorate
Solution Approach 1:
The patent transitions from planar (2D) memory cell arrangement to vertical (3D) stacking of memory cells and peripheral circuits. By forming isolation trenches and bonding substrates vertically, the memory capacity increases without reducing processing dimensions, thus avoiding the deterioration of manufacturing precision while achieving higher integration density.
2Quantity of substance
If access transistor and storage capacitor are vertically stacked to increase memory capacity, then memory capacity increases, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the semiconductor device into separate substrates: a first substrate containing memory cells and a second substrate containing peripheral circuits. This segmentation allows independent optimization and manufacturing of each substrate before bonding, reducing the complexity of vertical stacking while achieving high memory capacity through the stacked configuration.
Solution Approach 2:
The patent introduces isolation trenches as intermediary structures between vertically stacked memory cells and peripheral circuits. These trenches provide electrical isolation and mechanical support, facilitating the vertical stacking process and reducing manufacturing difficulty by enabling clear separation of functional regions during the bonding process.
3Area of stationary object
If isolation trenches and hydrogen-implanted layers are formed followed by smart cut and wafer bonding to enable vertical stacking, then chip area is reduced, but manufacturing process complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming isolation trenches and hydrogen-implanted layers in the substrates before the bonding process. The smart cut technique is applied in advance to create release structures that facilitate subsequent wafer bonding. These preliminary actions enable the vertical stacking process to proceed more smoothly and reduce the final chip area while managing manufacturing complexity through structured process sequencing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the reduction of chip area and cost by enabling the vertical stacking of memory cells and peripheral circuits, enhancing memory capacity and integration density.
Implementation Method 1
a hydrogen-implanted layer 18 is formed at a predetermined depth in the semiconductor substrate 10. Hydrogen is introduced into the hydrogen-implanted layer 18
Data Source
AI summary
An apparatus includes: a first semiconductor substrate; a plurality of first regions extending in parallel in a first direction on the first semiconductor substrate, each of the plurality of first regions including a plurality of first shallow trench isolations (STI) therein; and a plurality of second regions each extending between corresponding adjacent two of the plurality of first regions, each of the plurality of second regions including a plurality of second STIs and a plurality of active regions arranged alternately and in line in the first direction. Each of the plurality of second STIs has a greater depth than each of the plurality of first STIs.