I2C Dynamic Address Assignment for Conflict-Free Slave Identification
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Solution Overview
Problem
Existing I2C bus systems face address conflicts when multiple slave devices have the same device address, necessitating additional hardware like multiplexers, which increase costs and are limited by GPIO pins, restricting the number of supported slave devices.
Innovation Solution
A serial communication bus system with dynamic address assignment, where the master device assigns simulated identification codes (SIDs) based on confirmation signals, allowing each slave device to obtain a unique address through a random delay mechanism, without requiring additional hardware or signals beyond the I2C standard protocol.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a multiplexer is added to expand channels for address conflict resolution, then the number of supported slave devices is improved, but hardware costs and device complexity increase
Solution Approach 1:
The patent implements dynamic address assignment where slave devices randomly select from available addresses and the master device dynamically allocates addresses based on acknowledgment signals. This dynamic mechanism eliminates the need for static multiplexer configurations and allows the system to adapt to varying numbers of slave devices without hardware changes.
Solution Approach 2:
Slave devices autonomously generate random delay times and select addresses without requiring manual configuration or external control signals. The master device automatically assigns addresses based on acknowledgment responses, eliminating the need for complex multiplexer control logic and reducing overall system complexity.
2Reliability
If switch circuits and control signals are added for address assignment, then address conflicts are resolved, but device complexity and control difficulty increase
Solution Approach 1:
The master device uses acknowledgment signals from slave devices as feedback to determine successful address assignment. The slave device with the longest random delay time that receives an acknowledgment signal is assigned the address, ensuring uniqueness without requiring complex control circuits. The feedback mechanism automatically resolves address conflicts.
Solution Approach 2:
The patent replaces mechanical switch circuits with a software-based random delay mechanism and acknowledgment signal system. Instead of using physical switches to select addresses, the system uses timing-based random delays and digital acknowledgment signals to achieve address assignment, simplifying the control system.
3Ease of manufacture
If GPIO pins are used for address assignment, then existing hardware is utilized, but the number of supported slave devices is limited by the number of GPIO pins
Solution Approach 1:
The patent makes the I2C bus communication protocol itself serve multiple functions: data transmission and address assignment. By using the existing SDA and SCL lines for both purposes, the system eliminates the need for separate GPIO pins for address assignment, allowing unlimited slave devices to be supported without additional hardware.
Data Source
AI summary
A serial communication bus system with dynamic address assignment and its control method are provided in this invention. The system allows the master device to directly assign device addresses to slave devices without the need for additional signals. This assignment is determined by whether the slave device returns a confirmation (ACK) signal, enabling the next address allocation. Slave devices can also obtain unique device addresses through this allocation process. Therefore, with this invention's serial communication bus system and control method featuring dynamic address assignment, existing I2C bus signals can dynamically assign device addresses, facilitating the identification of a plurality of slave devices and preventing address conflicts among them, thereby improving communication transmission.