IC Array CD Uniformity via Blocking Mask Segmentation
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Solution Overview
Problem
Integrated circuit fabrication faces challenges in achieving uniform critical dimensions due to center-to-edge non-uniformities in dense feature arrays, particularly during etch processes and pitch-doubling, where edge portions tend to have different dimensions than central portions, leading to pattern non-uniformity and reduced efficiency.
Innovation Solution
The implementation of a process that forms a repeating pattern of features throughout a first region of a substrate, followed by an additional non-critical masking step to differentiate array and peripheral regions, allowing for the transfer of patterns while pushing edge non-uniformities to outer edges, thereby reducing center-to-edge deviations and improving uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If etch processes are used to form dense feature arrays, then circuit densities are increased, but center-to-edge non-uniformity occurs in critical dimensions
Solution Approach 1:
The patent segments the array formation process into multiple stages: first forming a repeating pattern across the entire first region, then using a blocking mask to differentiate array regions from peripheral regions. This segmentation allows the etch process to be applied uniformly across the substrate while preventing edge effects from affecting the central array regions, thereby maintaining critical dimension uniformity while achieving high circuit density.
Solution Approach 2:
The patent applies preliminary actions by first forming the repeating pattern of features throughout the entire first region before selectively removing features from peripheral regions. This preliminary formation ensures that etchants and deposition precursors are uniformly distributed across the substrate during the initial patterning step, establishing a uniform base pattern that can then be selectively modified without introducing center-to-edge non-uniformity.
2Measurement precision
If Optical Proximity Correction (OPC) techniques are used to remedy line-end shortening and distortion, then photolithography accuracy is improved, but center-to-edge non-uniformity in dense arrays is not remedied
Solution Approach 1:
The patent transitions from a two-dimensional photolithography correction approach (OPC) to a three-dimensional solution by adding a blocking mask layer that physically differentiates array regions from peripheral regions. This dimensional addition allows uniform etching across the substrate while selectively protecting array regions, achieving center-to-edge uniformity that OPC alone cannot provide.
3Productivity
If spacers are formed in a pitch-doubling process, then feature density is increased, but deposited spacers become thicker in edge portions than in central portions
Solution Approach 1:
The patent applies local quality by using a blocking mask to create different processing conditions in different regions of the substrate. Array regions are protected by the blocking mask while peripheral regions are exposed, allowing uniform spacer deposition thickness across the array regions while accepting that peripheral regions may have different characteristics. This local differentiation maintains spacer thickness uniformity in the critical array regions while achieving high feature density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances center-to-edge uniformity in integrated circuit arrays, achieving a center-to-edge line width deviation of between 0% and 5%, facilitating the formation of smaller features and more efficient circuits with improved circuit densities.
Implementation Method 1
etchants and deposition precursors are not uniformly diffused into edge portions and central portions of arrays during an etch process
Implementation Method 2
deposited spacers tend to be thicker in edge portions than in central portions of arrays
Data Source
AI summary
Methods for patterning integrated circuit (IC) device arrays employing an additional mask process for improving center-to-edge CD uniformity are disclosed. In one embodiment, a repeating pattern of features is formed in a masking layer over a first region of a substrate. Then, a blocking mask is applied over the features in the masking layer. The blocking mask is configured to differentiate array regions of the first region from peripheral regions of the first region. Subsequently, the pattern of features in the array regions is transferred into the substrate. In the embodiment, an etchant can be uniformly introduced to the masking layer because there is no distinction of center/edge in the masking layer. Thus, CD uniformity can be achieved in arrays which are later defined.