Integrated Circuit Capacitor Resistor Fabrication
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Solution Overview
Problem
Conventional semiconductor fabrication processes require separate fabrication of metal-insulator-metal (MIM) capacitors and thin film resistors, leading to increased cycle time and cost due to the need for special patterning and etching processes, as well as the resistive nature of thin film materials being unsuitable for capacitor plates.
Innovation Solution
An integrated circuit design where a capacitor and a resistor are formed simultaneously in the same fabrication process flow, with the capacitor comprising a top plate in an interlayer and a bottom plate in the lower inter-level dielectric layer, and the resistor including a resistive element with vias extending to the lower inter-level dielectric layer, allowing for cost-effective and efficient integration on a single semiconductor chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MIM capacitor and TFR are fabricated separately in conventional semiconductor fabrication processes, then each component can be optimized for its specific function, but the fabrication cycle time and cost increase significantly
Solution Approach 1:
The patent merges the fabrication processes for MIM capacitors and thin film resistors into a single integrated process flow. The same metal layer is used to form both the capacitor plates and the resistor element, and the same via formation and filling processes are used to create electrical connections for both components. This consolidation eliminates redundant fabrication steps while maintaining the functional optimization of each component type.
2Reliability
If separate fabrication processes are used for MIM capacitor and TFR, then each component achieves optimal performance, but manufacturing cost increases
Solution Approach 1:
The patent employs a universal metal layer that serves multiple functions: it forms the capacitor plates for MIM capacitors and simultaneously forms the resistive element for thin film resistors. The same deposition, patterning, and etching processes are used for both components, creating a multi-functional fabrication approach that reduces manufacturing complexity and cost while preserving component performance.
Data Source
AI summary
According to various embodiments, an integrated circuit may include an upper inter-level dielectric (ILD) layer, a lower ILD layer, and an interlayer arranged between the upper ILD layer and the lower ILD layer. The integrated circuit may further include a capacitor device and a resistor device. The capacitor device may include a top plate disposed in a first region of the interlayer and a bottom plate disposed in the lower ILD layer. The resistor device may include a resistive element and a plurality of vias disposed in a second region of the interlayer. The plurality of vias may extend from the resistive element to the lower ILD layer. A distance between the top plate and the lower ILD layer may be at least substantially equal to a height of each via of the plurality of vias.