IC Chip Bump Layout for Thermal Expansion Misalignment

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Solution Overview

Problem

Conventional integrated circuit (IC) chip bump designs face issues with thermal expansion, leading to stress and misalignment between IC chip bumps and substrate bumps, which can result in electrical connection failures and require separate IC chips for different electronic device designs, increasing costs.

Innovation Solution

The design features IC chip bumps with varying widths and offset centers relative to their pads, allowing for increased tolerance and reduced thermal expansion misalignment, enabling a single IC chip to be used across multiple electronic device designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional IC chip bump designs with aligned centers and uniform widths are used, then manufacturing is simple, but thermal expansion causes misalignment and stress between bumps and substrate during crimping

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidbump alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by intentionally misaligning the bump center from the pad center and using non-uniform bump widths across different pads. This asymmetric configuration creates tolerance zones that accommodate thermal expansion misalignment during crimping, preventing electrical connection failures while maintaining manufacturing feasibility

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements local quality by varying the width of individual bumps based on their specific location and thermal expansion characteristics. Different bumps have different widths optimized for their local thermal and mechanical conditions, allowing each bump to independently accommodate local misalignment stresses

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If a single IC chip design is used for multiple electronic device designs, then production costs are reduced, but the bump configuration may not provide sufficient tolerance for reliable mounting to each different device

Engineering Contradiction:
ImproveIC chip production costVSAvoidbump configuration adaptability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent achieves universality by designing a single IC chip with non-uniform bump widths and offset centers that can adapt to multiple different electronic device designs. This universal bump configuration provides sufficient tolerance for reliable mounting across various devices without requiring device-specific custom IC chips, thereby reducing production costs while maintaining adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses parameter changes by varying the width and position parameters of bumps across different pads. This parameter variation within a single chip design enables the same IC chip to accommodate different mounting requirements of various electronic devices, providing both cost efficiency and design versatility

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If IC chip bumps have uniform width matching pad width, then manufacturing is straightforward, but thermal expansion during crimping causes misalignment and stress

Engineering Contradiction:
Improvebump manufacturing simplicityVSAvoidthermal expansion stress
Core Design Contradiction:
Ease of manufactureVSStress or pressure

Solution Approach 1:

The patent applies local quality by assigning different widths to different bumps based on their specific pad locations and thermal expansion characteristics. This localized optimization reduces thermal expansion stress at each bump location while maintaining overall manufacturing simplicity through a systematic non-uniform width design

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces the likelihood of electrical connection failures and eliminates the need for custom IC chips for each device design, lowering production costs and improving reliability across various electronic devices.

Implementation Method 1

Exposing the IC chip to high temperature conditions may cause the IC chip to expand relative to the substrate, which may result in stress and misalignment between one or more bumps on the IC chip and one or more bumps on the substrate

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11177229B2IC chip layout for minimizing thermal expansion misalignment
Publication Date: 2021.11.16 SYNAPTICS INC
  • US11177229B2 patent drawing
  • US11177229B2 patent drawing
  • US11177229B2 patent drawing

AI summary

An integrated circuit (IC) chip comprises a plurality of pads and a plurality of bumps. The plurality of pads includes a first pad. The plurality of bumps is disposed on the plurality of pads. The plurality of bumps includes a first bump disposed on the first pad. The first bump as a width that is different than an exposed with of the first pad. The center of the first bump is not aligned with a center of the first pad.