Integrated Circuit Control Points for OPC Defect Detection
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Solution Overview
Problem
The existing methods for designing integrated circuits are labor-intensive and costly due to the need for multiple iterations of optical proximity correction (OPC) and defect evaluation, as they fail to accurately identify and address critical patterning defects, leading to potential failures in the final device.
Innovation Solution
The method involves using control points during both OPC optimization and wafer patterning defect evaluation, with attributes like location, tolerance, and critical dimension stored for later retrieval, and an algorithm for determining control point placement, allowing for improved defect detection and model accuracy, enabling re-use of information to optimize the OPC process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple iterations of OPC and defect evaluation are performed, then defect detection accuracy is improved, but time consumption and cost increase
Solution Approach 1:
The patent applies preliminary action by performing defect evaluation on the reticle layout before manufacturing wafer dies. This allows defects to be identified and corrected in the design stage, avoiding the need for multiple iterative cycles of OPC optimization, wafer fabrication, and post-manufacturing defect detection. The control points are established in advance to guide the defect evaluation process.
2Measurement precision
If multiple iterations of OPC and defect evaluation are performed, then defect detection accuracy is improved, but cost increases
Solution Approach 1:
The patent performs defect evaluation on the reticle layout before wafer die manufacturing, allowing defects to be corrected in the design phase. This preliminary defect detection and correction eliminates the need for costly iterative cycles of OPC optimization, repeated wafer fabrication, and post-manufacturing testing, significantly reducing overall development costs.
3Productivity
If control points are retained for defect evaluation, then information re-use efficiency is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by making control points serve multiple functions: they are used during OPC optimization to correct patterning defects and then retained for subsequent defect evaluation on the reticle layout. This multi-functional use of control points enables information re-use across different stages of the design process, improving efficiency without requiring separate control mechanisms for each stage.
Data Source
AI summary
Method and apparatus for designing an integrated circuit by adding a plurality of control points to an integrated circuit wafer design. Each control point has at least one attribute. Then, an integrated circuit wafer is manufactured using the integrated circuit wafer design. A defect on the integrated circuit wafer is then located. The control points are adjusted such that they correspond with the defect.