Integrated Circuit Control Set Optimization for Placement
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Solution Overview
Problem
Integrated circuits (ICs) face challenges in implementing circuit designs with a large number of control sets due to architectural limitations, leading to unused sites in circuit blocks, significant timing, power, and routability degradation, and infeasible placement legalization.
Innovation Solution
The method involves determining regular, super, and mega control sets for a circuit design, performing control set optimization through clock-enable-only, set/reset, and clock-enable reductions, and selectively modifying the design to improve a cost metric for each control set, allowing for better resource sharing and placement optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If circuit design elements with different control sets are placed in the same circuit block, then resource utilization improves, but architectural limitations prevent proper functioning
Solution Approach 1:
The patent segments circuit design elements into different control set groups based on their clock, set/reset, and clock-enable signal requirements. By dividing elements with identical control signals into separate groups, the invention enables proper placement within architectural constraints while maintaining high resource utilization through optimized grouping strategies.
Solution Approach 2:
The invention applies local quality by assigning different control set characteristics to different regions or groups within the circuit block. Each control set group is optimized for its specific control signal requirements, allowing the overall circuit block to accommodate diverse elements with different control needs while maintaining functional integrity.
2Adaptability or versatility
If circuit blocks are designed to accommodate multiple control set groups, then design flexibility improves, but the number of required control signals increases beyond architectural limits
Solution Approach 1:
The patent merges control signals by identifying and grouping circuit elements that share identical clock, set/reset, and clock-enable signals. Elements within each control set group are driven by the same control signals, reducing the total number of control signals required while maintaining design flexibility through efficient signal sharing across multiple elements.
3Ease of manufacture
If placement legalization is performed on circuit designs with many control set groups, then placement feasibility improves, but timing, power, and routability degradation occurs
Solution Approach 1:
The invention performs preliminary control set optimization before placement legalization by pre-grouping circuit elements into control set groups and determining optimal control signal assignments. This preliminary organization enables subsequent placement legalization to proceed smoothly while avoiding the timing, power, and routability degradation that would result from post-placement optimization attempts.
Data Source
AI summary
Implementing circuit designs in integrated circuit devices includes determining, using computer hardware, regular control sets, super control sets, and mega control sets for a circuit design. Control set optimization is performed on the circuit design. Performing control set optimization includes performing a clock-enable-only control set reduction for each super control set. Performing control set optimization includes performing a set/reset control set reduction and a clock-enable control set reduction for each mega control set. The circuit design is selectively modified by committing changes determined from the control set reductions to the circuit design on a per control set basis based on an improvement of a cost metric for each control set.