Integrated Circuit Global Routing via Localized Region Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current integrated circuit design tools lack efficient global routing optimization, as they primarily focus on synthesis and placement, failing to address varying design challenges across different chip areas, such as timing, power, routability, congestion, and yield, which require tailored optimization objectives and constraints.

Innovation Solution

The method involves defining regions and netgroups within integrated circuits, associating optimization objectives with each, generating constraints based on these objectives, and performing global routing using a revised resource sharing algorithm to optimize each region or netgroup independently, allowing for fine-grained optimization across the chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If global routing is performed without localized optimization, then the routing process is simpler and faster, but it fails to address specific design challenges in different chip areas such as timing, power, routability, congestion, and yield

Engineering Contradiction:
Improveability to address different design challenges in different chip areasVSAvoidcomplexity of routing process with localized optimization
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The chip is divided into multiple regions, each with its own optimization objectives and constraints. The routing process is segmented into region-specific optimizations for timing, power, routability, congestion, and yield, allowing tailored optimization for each area while maintaining overall routing efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different optimization objectives are applied to different regions of the chip based on local design requirements. Each region can have customized constraints and optimization goals, enabling localized quality improvement without requiring complete redesign of the entire routing system

Inventive Principle:
Principle #3Local quality

2Reliability

If optimization is applied to the entire chip uniformly, then the routing process is simpler to manage, but it cannot address varying design optimization objectives across different regions

Engineering Contradiction:
Improvequality of routing optimizationVSAvoidcomplexity of managing multiple optimization objectives
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The optimization process is divided into region-specific segments, each handling a particular optimization objective (timing, power, routability, congestion, yield). This segmentation improves reliability by addressing each objective with appropriate constraints while managing complexity through modular organization

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically assigns different optimization objectives to different regions based on design requirements. The routing process can adaptively adjust constraints and objectives for each region, improving overall routing quality while maintaining manageable complexity through dynamic configuration

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10120970B2Global routing framework of integrated circuit based on localized routing optimization
Publication Date: 2018.11.06 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10120970B2 patent drawing
  • US10120970B2 patent drawing
  • US10120970B2 patent drawing

AI summary

The present disclosure relates to methods, processing systems and computer program products of global routing of integrated circuits based on localized routing optimization. In certain embodiments, the method may include one or more of: defining one or more regions, one or more netgroups, and combinations thereof of an integrated circuit, associating at least one optimization objective with each region and/or each netgroup defined, generating one or more constraints for each region and/or each netgroup based on the associated optimization objectives, and performing global routing of the integrated circuit according to the one or more constraints.