IC Layout Metal Cut Spacing Adjustment for DGE Suppression

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor integrated circuit (IC) industry faces challenges in achieving uniformity and performance due to density gradient effects (DGE) and landing effects (LE) associated with IC device layout configurations, which are exacerbated by inadequate spacing between internal metal cuts in IC design layouts.

Innovation Solution

A method for modifying IC design layouts to adjust the spacing between internal metal cuts using a modified metal-cut mask layer, aligning cuts with poly/gate electrodes or source/drain conductors, and incorporating safe regions to ensure horizontal spacing meets design rules, thereby reducing DGE/LE without requiring additional mask layers or internal configuration modifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If internal metal cuts are placed closer together to increase circuit density, then IC functional density is improved, but density gradient effects and landing effects worsen due to inadequate spacing

Engineering Contradiction:
ImproveIC functional densityVSAvoiduniformity of patterning and etching processes
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing layout modifications before manufacturing to anticipate and prevent DGE/LE issues. The system automatically identifies regions with inadequate metal cut spacing and adjusts the layout in advance, ensuring that spacing requirements are met before the patterning and etching processes begin, thereby preventing manufacturing defects rather than correcting them later

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting the spacing parameter between internal metal cuts based on detected layout conditions. The system modifies the horizontal spacing parameter to meet minimum threshold requirements while maintaining overall circuit density, using automated algorithms to optimize spacing parameters across different regions of the IC layout

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If additional mask layers are added to ensure adequate spacing between internal metal cuts, then manufacturing precision is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvespacing control between internal metal cutsVSAvoidnumber of mask layers
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies inversion by reversing the conventional approach: instead of adding mask layers to control spacing, the system inverts the problem by modifying the layout geometry itself to ensure adequate spacing. The methodology shifts from process-based solutions (additional masks) to design-based solutions (layout configuration), thereby simplifying the manufacturing process while maintaining precision

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts the spacing control requirement from the manufacturing process and embeds it directly into the layout design phase. By taking out the spacing constraint and incorporating it into the automated layout modification system, the patent eliminates the need for additional mask layers, as the spacing is inherently built into the design rather than being enforced through extra process steps

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If internal metal cuts are spaced further apart to reduce DGE/LE, then patterning uniformity is improved, but IC functional density decreases

Engineering Contradiction:
Improvepatterning uniformityVSAvoidIC functional density
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies local quality by implementing region-specific spacing adjustments rather than uniform spacing across the entire IC layout. The system identifies local regions where metal cuts are inadequately spaced and applies spacing modifications only to those specific areas, maintaining adequate patterning uniformity where needed while preserving high density in other regions, thereby optimizing the balance between uniformity and functional density

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11080461B2Method for improved cut metal patterning
Publication Date: 2021.08.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11080461B2 patent drawing
  • US11080461B2 patent drawing
  • US11080461B2 patent drawing

AI summary

A system for preparing an integrated circuit device design includes a memory for storing a plurality of preliminary integrated circuit design files; a processor for retrieving a preliminary integrated circuit design file from the memory; locating vertical abutments between adjacent device cell designs, identifying internal metal cuts on the adjacent device cell designs; determining and evaluating a horizontal spacing between the internal metal cuts a spacing threshold; and if the threshold is note met, shifting one cell horizontally relative to the other cell design by a predetermined distance to define a modified device layout, repeating the determining, evaluating, and shifting operations until the spacing threshold is satisfied; and identifying a next vertical abutment between and repeating the identifying, determining, shifting operations until the spacing threshold has been satisfied for all vertical abutments.