Integrated Circuit Metallisation Grid for Electromagnetic Attack Protection
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Solution Overview
Problem
Integrated circuits are vulnerable to electromagnetic attacks, particularly when attackers use induction loops to detect currents within the metallisation stack, as it is difficult to distinguish between the features of the first and second grids, and the proximity and intermingling of these grids complicate current detection.
Innovation Solution
The integrated circuit design includes a second grid of patterned metal features interspersed with the first grid, with narrower metal lines and alternating directions, interconnected by vias, to increase complexity and density, making it harder to conduct electromagnetic attacks. The second grid is electrically connected to the first grid, providing additional paths for current flow and reducing resistance, while its layout appears non-repeating and random, confusing attackers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single grid of metal lines is used for power supply and signal connections, then the circuit functionality is achieved, but the integrated circuit becomes vulnerable to electromagnetic attacks using induction loops
Solution Approach 1:
The patent divides the metallisation stack into two separate grids: a first grid for power supply and signal connections, and a second grid specifically for electromagnetic attack protection. This segmentation allows each grid to serve its specific function independently, with the second grid creating electromagnetic interference that masks the signals from the first grid, thereby preventing successful electromagnetic attacks while maintaining normal circuit functionality.
Solution Approach 2:
The second grid acts as an intermediary layer between the induction loop attacker and the first grid containing sensitive signals. By positioning this protective grid in between, it intercepts and masks electromagnetic fields, preventing direct probing of the first grid's current paths while allowing power and signal distribution to continue uninterrupted.
2Reliability
If the second protective grid is placed separately from the first grid, then electromagnetic attack protection is provided, but the grids can be easily distinguished and the protection effectiveness is reduced
Solution Approach 1:
The patent merges the two grids by interspersing the second grid's metal lines among the first grid's metal lines within the same metallisation stack. This intermingling creates a visually and electrically complex structure where the grids cannot be easily distinguished, forcing attackers to deal with electromagnetic interference from both grids simultaneously, thereby rendering electromagnetic attacks ineffective.
Solution Approach 2:
The second grid is configured with locally varying properties including different line widths, spacing, and orientations compared to the first grid. In some regions, the second grid lines are narrower or wider, and their spacing varies to create non-uniform electromagnetic interference patterns. This local variation in quality makes it extremely difficult for attackers to identify and probe the correct current paths.
3Reliability
If the metal lines of the second grid are made wider, then the electromagnetic shielding effect is enhanced, but the resistance increases and current flow is impeded
Solution Approach 1:
The patent employs varying line width parameters for the second grid's metal lines across different regions of the circuit. Rather than using uniform wide lines throughout, the width is adjusted locally based on the required electromagnetic protection level and current flow requirements. This parameter variation allows optimization of both shielding effectiveness and electrical performance in different areas of the integrated circuit.
Data Source
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AI summary
An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate. The integrated circuit also includes a metallisation stack located on a major surface of the semiconductor substrate. The metallisation stack includes a plurality of metal layers including patterned metal features. Each metal layer of the metallisation stack is separated by an intervening dielectric layer. The metallisation stack forms a first grid including patterned metal features for supplying power and signal connections to components of the integrated circuit located in the semiconductor substrate. The metallisation stack also forms a second grid for securing the integrated circuit against electromagnetic attacks. The second grid includes patterned metal features interspersed with the patterned metal features of the first grid in at least some of the metal layers of the metallisation stack. The patterned metal features of the second grid are electrically connected to the first grid.