Noise Isolation Between IC Circuit Blocks Using P-Well and Shield
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Solution Overview
Problem
Conventional noise isolation methods between different circuit blocks in integrated circuit chips are inefficient due to bias contamination, which compromises noise isolation performance.
Innovation Solution
The implementation of a p-well block region with low doping concentration and guard regions, along with grounded highly doped regions and a conductive shield over a dielectric layer, provides effective noise isolation between circuit blocks by blocking dopant insertion and using a trench structure for additional isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional bias-based noise isolation is used, then noise isolation between circuit blocks is provided, but the isolation efficiency is compromised due to bias contamination
Solution Approach 1:
The patent extracts and removes the problematic bias component from the noise isolation mechanism. Instead of using bias-based isolation, the invention employs a dedicated isolation structure (isolation transistor and isolation capacitor) that operates independently of the circuit bias, thereby eliminating bias contamination while maintaining noise isolation functionality.
Solution Approach 2:
The patent introduces an intermediary isolation structure consisting of an isolation transistor and isolation capacitor between the first and second circuit blocks. This intermediary structure acts as a mediator that blocks noise transmission without requiring bias, thereby improving noise isolation efficiency while maintaining circuit operation.
2Object-affected harmful factors
If multiple isolation structures (p-well block, guard regions, trenches, conductive shield) are implemented, then noise isolation efficiency is enhanced, but device complexity increases
Solution Approach 1:
The patent segments the noise isolation function into multiple distinct structural components: p-well block region, guard regions, trenches, and conductive shield. Each segment performs a specific aspect of noise isolation, allowing the overall system to achieve superior noise rejection through the combined effect of multiple specialized elements rather than a single complex structure.
Solution Approach 2:
The patent employs a composite isolation structure that combines different materials and structural forms (semiconductor p-well regions, dielectric guard regions, conductive shields, and trench structures) to achieve enhanced noise isolation. This composite approach leverages the unique properties of each material and structure type to collectively improve noise isolation efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances noise isolation efficiency by reducing interference between circuit blocks, improving the performance of sensitive circuits like phase locked loops and low noise amplifier circuits.
Implementation Method 1
a p-well block region having a high resistivity due to low doping concentration formed in a region of a substrate for providing noise isolation between a first circuit block and a second circuit block
Implementation Method 2
a grounded conductive shield formed over a dielectric layer formed at least over the p-well block region and the guard region
Data Source
AI summary
An integrated circuit includes a p-well block region having a low doping concentration formed in a region of a substrate for providing noise isolation between a first circuit block and a second circuit block. The integrated circuit further includes a guard region and a grounded, highly doped region for providing additional noise isolation.