IC Package Interconnect Stack for Pin Density
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Solution Overview
Problem
The challenge in integrated circuit packages is to achieve reduced package dimensions and increased functional integration while managing input/output (I/O) differences, which existing technologies have not adequately addressed, leading to complex I/O designs and increased manufacturing costs.
Innovation Solution
The solution involves forming an interconnect stack on external leads with bond pads, allowing multiple bond pads to be connected to a single pin, using wire stitches and ball bonds to minimize space and increase pin density, and encapsulating the die and leads to reduce package height and footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple bond pads are connected to a single pin through internal circuit designs, then the I/O differences are handled, but the I/O designs become more complex and manufacturing costs increase
Solution Approach 1:
The patent transitions from planar I/O connections to three-dimensional stacked interconnects. Multiple bond pads are connected vertically through stacked interconnect structures (including through-silicon vias and interlayer dielectric layers) to a single external pin, enabling I/O multiplexing without increasing lateral footprint or design complexity
2Adaptability or versatility
If multiple bond wires are tied to a single pin, then the I/O differences are managed, but more surface area on the pins is required
Solution Approach 1:
The patent utilizes the vertical dimension by stacking interconnect structures through the substrate thickness. Multiple bond wires connect to different levels of the interconnect stack, which are then routed through vertical vias to converge at a single external pin, eliminating the need for increased pin surface area while supporting multiple I/O connections
3Length of stationary object
If the package dimensions are reduced, then the physical space is optimized, but the test and debug functions require additional visibility beyond normal I/O
Solution Approach 1:
The patent designs the stacked interconnect structure to serve dual purposes: normal operational I/O connections and test/debug access. The same vertical interconnect stack that multiplexes operational signals also provides accessible test points and debug interfaces, enabling comprehensive testing without increasing package footprint
Data Source
AI summary
An integrated circuit package system is provided forming an integrated circuit die having a first bond pad provided thereon, forming an interconnect stack on a first external interconnect, and connecting the interconnect stack to the first bond pad.