IC Packaging Substrate Removal for Reduced Propagation Delay
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Solution Overview
Problem
Current integrated circuit packaging systems face challenges in achieving miniaturization, increased packaging density, performance, and cost reduction, particularly in portable devices, as they struggle to efficiently integrate more components into smaller spaces while maintaining performance and reducing manufacturing costs.
Innovation Solution
The method involves providing a substrate, attaching a base component with a first interconnect, adding a stack component connected by a second interconnect, molding an encapsulation, and then removing the substrate to partially expose the interconnects, allowing for improved chip interconnection and integration without the need for a substrate, which reduces propagation delays and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a substrate is used to attach base component and stack component, then manufacturing process is simplified and components are securely held, but manufacturing costs increase and propagation delays occur
Solution Approach 1:
The patent removes the substrate from the final package structure after it has served its purpose during assembly. The substrate is used temporarily to attach the base component and stack component, then removed to eliminate propagation delays and reduce costs, leaving only the necessary interconnect structures.
2Quantity of substance
If more integrated circuits are integrated into a single package, then packaging density increases, but package area increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration. Multiple integrated circuits are arranged vertically in stacks rather than horizontally, allowing more components to be packed into the same footprint area by utilizing the vertical dimension.
Solution Approach 2:
The patent implements a stacked configuration where multiple integrated circuits are nested vertically, with each circuit positioned above the previous one. This nesting approach allows multiple components to occupy the same horizontal space by stacking them in the vertical direction.
3Ease of manufacture
If conventional leadframe-based packages are used, then manufacturing is straightforward, but chip interconnection performance is limited and cost reduction is difficult
Solution Approach 1:
The patent divides the interconnect structure into separate, modular components - the base component, stack component, and distinct interconnect structures. This segmentation allows for optimized design of each component and enables advanced interconnection techniques that improve performance while maintaining manufacturability.
Data Source
AI summary
A method of manufacture an integrated circuit packaging system includes: providing a substrate; attaching a base component to the substrate by a first interconnect; attaching a stack component connected by a second interconnect to the substrate and partially over the base component, the second interconnect different from the first interconnect; molding an encapsulation over the base component, the first interconnect, the stack component, and the second interconnect; and removing the substrate to partially expose the first interconnect and the second interconnect from the encapsulation.