IC Pattern Layout With Mandrel Bars for Lithography Accuracy
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Solution Overview
Problem
Conventional optical lithography technologies struggle to accurately scale down IC designs to smaller nodes, leading to issues such as rounding, pinching, necking, bridging, dishing, and metal line thickness variations, which affect device performance and integration.
Innovation Solution
A method involving the formation of a pattern layout that includes extending device patterns, adding dummy patterns outside layout blocks, and inserting mandrel bar patterns to connect these, followed by mask fabrication to enhance pattern density and prevent space violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional optical lithography is used to scale down IC designs to smaller nodes, then manufacturing simplicity is maintained, but pattern accuracy deteriorates due to resolution limits causing rounding, pinching, necking, bridging, dishing, and metal line thickness variations
Solution Approach 1:
The patent applies preliminary action by adding dummy patterns and mandrel bar patterns to the layout design before the actual manufacturing process. These auxiliary patterns are strategically placed to compensate for expected lithography distortions, ensuring that the final printed patterns achieve the desired accuracy despite the limitations of conventional optical lithography at small nodes
Solution Approach 2:
The patent changes the layout parameters by introducing specific design rules for dummy patterns and mandrel bars, including their dimensions, spacing, and positioning relative to actual device patterns. These parameter modifications enable constructive light interference during lithography, improving pattern accuracy without requiring advanced lithography equipment
2Manufacturing precision
If restrictive design rules are applied to improve image printing quality, then pattern accuracy is improved, but area utilization deteriorates due to increased spacing requirements between patterns
Solution Approach 1:
The patent uses dummy patterns and mandrel bar patterns as intermediary elements that mediate between the conflicting requirements of pattern accuracy and area utilization. These intermediaries are placed in the spacing regions between actual device patterns, allowing the main device patterns to maintain their functional spacing while the intermediaries provide the necessary optical support for accurate printing
Solution Approach 2:
The patent applies local quality by selectively adding dummy patterns and mandrel bars only in specific regions where optical support is needed, rather than uniformly across the entire layout. This localized approach maintains area utilization efficiency while improving image printing quality at critical locations
3Adaptability or versatility
If multiple layout blocks with different design rules are used to accommodate various IC components, then design flexibility is improved, but manufacturing complexity increases due to spacing requirements between layout blocks
Solution Approach 1:
The patent merges multiple layout blocks by adding mandrel bar patterns that extend across the boundaries between different layout blocks. These mandrel bars act as connecting elements that unify the optical support structure across multiple blocks, allowing them to be manufactured together as an integrated structure rather than as separate, complex components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves pattern density and reduces manufacturing defects by ensuring adequate spacing between patterns, thereby enhancing the accuracy and integrity of IC features during fabrication.
Implementation Method 1
The line width and line pitch are designed so as to improve image printing quality by utilizing constructive light interference
Data Source
AI summary
A method for forming a pattern layout is provided, including: receiving an integrated circuit design layout including a layout block having a first edge, a second edge, a third edge, and a fourth edge sequentially connected to each other, first line patterns are disposed inside the layout block along the first direction; forming second line patterns outside the layout block and parallel to the first line patterns; forming a mandrel bar pattern oriented along the second direction, the first line patterns and the second line patterns have end edges overlapping an interior region of the mandrel bar pattern having a first portion in the layout block and a second portion outside the layout block and separated by the second edge or the fourth edge; and outputting the pattern layout having the layout block, the first line patterns, second line patterns, and the mandrel bar pattern for mask fabricating.