Sub-Lithographic IC Pattern With Offset Contact Areas
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in integrated circuit fabrication is to reduce the pitch below lithographic dimensions while ensuring compatibility with access elements like vertical plugs, as existing photolithographic equipment limits the minimum feature size and space width, and multiple patterning methods struggle to create compatible contact areas for sub-lithographic dimensions.
Innovation Solution
A quadruple patterning method is employed, where parallel lines with different pitches are formed over a substrate, with the Y direction portions having a larger pitch than the X direction portions, allowing for the creation of offset portions that define contact areas for subsequent pattern transferring procedures, enabling the use of conventional or larger contact pads for electrical access to sub-lithographically sized X direction portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning methods are used to reduce pitch below lithographic dimensions, then line density increases and pitch reduces, but compatibility with access elements like vertical plugs deteriorates due to lithographic mask limitations and misalignment allowances
Solution Approach 1:
The patent segments the patterned lines into two distinct pitch dimensions: sub-lithographic pitch in the X direction for high-density interconnect lines, and lithographic pitch in theY direction for access element compatibility. This segmentation allows each direction to be optimized independently for its specific function.
Solution Approach 2:
The patent applies different pitch characteristics to different spatial locations and orientations: X-direction portions have sub-lithographic pitch optimized for line density, whileY-direction portions have lithographic pitch optimized for access element formation. This local differentiation resolves the contradiction between high density and access compatibility.
2Ease of manufacture
If conventional photolithographic equipment is used, then manufacturing process simplicity is maintained, but minimum feature width and space width are limited by resolution capacity
Solution Approach 1:
The patent transitions from a single-pitch constraint to a two-pitch system with different characteristics in X andY directions. This dimensional differentiation allows the system to achieve sub-lithographic dimensions in one direction while maintaining lithographic dimensions in the other, effectively bypassing the resolution limits of conventional photolithographic equipment.
3Manufacturing precision
If pitch is reduced to sub lithographic dimensions, then line density increases, but contact area formation becomes difficult due to lithographic mask size limitations
Solution Approach 1:
The patent segments the pitch into two distinct scales: sub-lithographic pitch for X-direction interconnect lines achieving high density, and lithographic pitch forY-direction access areas enabling conventional contact formation. This segmentation resolves the contradiction between high density and ease of contact area formation.
Solution Approach 2:
The patent applies different pitch characteristics to different spatial locations: sub-lithographic pitch in theX direction where high line density is required, and lithographic pitch in theY direction where access element formation is required. This local quality differentiation enables both high density and easy contact formation.
Data Source
AI summary
An integrated circuit pattern comprises a set of lines of material having X and Y direction portions. The X and Y direction portions have first and second pitches, the second pitch being larger, such as at least 3 times larger, than the first pitch. The X direction portions are parallel and the Y direction portions are parallel. The end regions of the Y direction portions comprise main line portions and offset portions. The offset portions comprise offset elements spaced apart from and electrically connected to the main line portions. The offset portions define contact areas for subsequent pattern transferring procedures. A multiple patterning method, for use during integrated circuit processing procedures, provides contact areas for subsequent pattern transferring procedures.