Integrated Circuit Power Gating via Independent Domains
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Solution Overview
Problem
Existing integrated circuits (ICs) face challenges in efficiently powering down unused portions, leading to increased power consumption and operating temperature due to leakage current, particularly in complex programmable logic devices like FPGAs and CPLDs, where unused logic blocks continue to consume power.
Innovation Solution
The implementation of independent power domains with separate power pads and buses, connected through test elements like PMOS transistors or fusible links, allows for selective powering or depowering of IC regions, reducing leakage current and conserving power by isolating unused power domains during operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a power gate switch is used to selectively power or depower a selected region of an IC, then power consumption is reduced, but the switch consumes significant power, generates heat, and degrades performance when the block is turned on
Solution Approach 1:
The IC is divided into multiple independent power domains, each with its own power pad and power domain bus. This segmentation allows selective powering of only the required functional blocks without affecting other regions, eliminating the need for a single large power gate switch that degrades overall performance.
Solution Approach 2:
The power delivery function is extracted from a centralized power gate switch and distributed to multiple independent power pads and domain buses. This removes the performance-degrading switch from the critical signal path while maintaining the ability to selectively power regions.
2Loss of energy
If independent power domains are implemented with separate power pads and buses, then power consumption and temperature are reduced by isolating unused regions, but device complexity increases
Solution Approach 1:
Multiple power pads serve dual purposes: they function as independent power delivery points during normal operation to enable selective region powering, and they can be connected through test elements during manufacturing testing to verify functionality across the entire device, reducing the need for separate test infrastructure.
3Loss of energy
If power gates are made sufficiently low resistance to minimize power consumption when blocks are turned on, then the physically large device size results from the trade-off between power gate size and acceptable performance degradation
Solution Approach 1:
Instead of using one or two large power gate switches that occupy significant area, the power delivery is segmented into multiple independent domains with smaller power pads and domain buses. This distributes the power delivery function across multiple smaller structures, reducing overall device area while maintaining low resistance paths in each domain.
Data Source
AI summary
An integrated circuit has a first independent power domain having a first power domain bus electrically connected to first functional blocks and a first power pad electrically connected to the first power domain bus and a second independent power domain having a second power domain bus electrically connected to second functional blocks and a second power pad electrically connected to the second power domain bus. A test element is between the first power domain bus and the second power domain bus.