IC Power Estimation via Redundant Frame Detection
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Solution Overview
Problem
Current IC design tools lack insight into power consumption limits, leading to inefficient attempts at reducing power consumption through techniques like clock gating and power gating, with designers often applying lengthy methods with little to no effect.
Innovation Solution
A computer-implemented method and system that identify redundant frames in IC circuits, determining ideal power consumption by distinguishing between propagating and non-propagating activities, and providing feedback to users on redundant frames and their sources, allowing for targeted power reduction without affecting functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If designers apply traditional power reduction techniques such as clock gating and power gating, then power consumption can be reduced, but the design process becomes lengthy and cumbersome with little to no effect in consumed power reduction
Solution Approach 1:
The patent performs preliminary identification of redundant frames and calculation of ideal power consumption before the designer applies power reduction techniques. By pre-analyzing the circuit to determine the theoretical minimum power floor, the system provides guidance that prevents wasted design time on ineffective techniques, thereby resolving the contradiction between achieving power reduction and avoiding lengthy unsuccessful design iterations
Solution Approach 2:
The patent implements a feedback mechanism that provides designers with information about redundant frames and ideal power consumption levels. This feedback enables designers to make informed decisions about which power reduction techniques to apply and when to stop, avoiding the trial-and-error approach that consumes excessive design time while seeking marginal power improvements
2Use of energy by moving object
If designers apply lengthy and cumbersome techniques to reduce power consumption, then power reduction is attempted, but the techniques have little to no effect in consumed power reduction
Solution Approach 1:
The patent enables the design system to automatically identify redundant frames and calculate ideal power consumption without requiring complex manual analysis by the designer. The automated system serves itself by performing the analytical work that would otherwise require cumbersome designer intervention, thereby reducing design complexity while still achieving effective power reduction strategies
Solution Approach 2:
The patent replaces the mechanical/manual process of power analysis and optimization with an automated computational system. Instead of designers manually analyzing circuits and applying techniques, the system uses algorithms to automatically identify redundant frames and compute ideal power levels, substituting complex manual mechanical analysis with automated computational methods that are both simpler to use and more effective
3Use of energy by moving object
If designers attempt to reduce power consumption without knowing the floor of consumed power, then power reduction techniques are applied, but the limits of power consumption reduction remain unknown
Solution Approach 1:
The patent performs preliminary calculation of the power floor by identifying redundant frames before the designer begins power reduction efforts. By computing the ideal power consumption level in advance, the system provides critical information about the theoretical minimum power that can be achieved, enabling designers to understand the limits of power reduction and avoid wasting effort on techniques that cannot achieve further improvements below the calculated floor
Solution Approach 2:
The patent provides feedback to designers about the calculated power floor and the amount of power wasted in redundant frames. This information feedback empowers designers to understand the limits of power reduction, see how much power can potentially be saved by eliminating redundant activity, and make informed decisions about whether to continue applying power reduction techniques or accept that the floor has been approached
Data Source
AI summary
A method for determining power consumed by a circuit is described that includes identifying a redundant frame including one of a clock toggle or a data toggle that is not propagated to an output pin of the circuit and identifying a non-redundant frame comprising a clock toggle and a data toggle that are propagated to the output pin of the circuit. Further, the method includes determining an ideal power consumed by the circuit during the non-redundant frame and providing a feedback to the user, the feedback including the redundant frame, a source of the redundant frame, and the ideal power consumed by the circuit during the non-redundant frame.