Redundancy Circuit Repair Location Prediction for IC Yield

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Solution Overview

Problem

In integrated circuit chip manufacturing, redundancy circuits are used to repair fail bits, but new fail bits often appear after repair, leading to scrapped chips and reduced yield, quality issues, and increased warranty costs.

Innovation Solution

A method is developed to determine a final repair location for redundancy circuits by identifying initial repair locations, potential fail lines, and predicted repair locations, allowing for simultaneous repair of existing and potential fail bits, thereby reducing the occurrence of new fail bits and improving chip yield and quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundancy circuit repair is performed on fail bits, then chip reliability is improved, but new fail bits appear leading to reduced yield

Engineering Contradiction:
Improvechip reliabilityVSAvoidchip yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent determines potential fail lines and predicted repair locations before performing the actual repair. By analyzing the spatial distribution of fail bits and identifying lines that are likely to generate new fails, the method prepares a comprehensive repair plan that prevents new fail bits from appearing during the repair process, thus maintaining both reliability and yield

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies preliminary anti-action by identifying potential fail lines and predicted repair locations in advance, and deliberately avoiding these locations when selecting final repair locations. This preemptive avoidance strategy counteracts the tendency for new fail bits to appear during repair, resolving the contradiction between improving reliability through repair and maintaining production yield

Inventive Principle:
Principle #9Preliminary anti-action

2Manufacturing precision

If repair locations are assigned based on fail bit locations, then repair effectiveness is improved, but new fail bits appear due to potential fail lines

Engineering Contradiction:
Improverepair precisionVSAvoidchip reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent employs feedback by using the determined potential fail lines and predicted repair locations to adjust and optimize the initial repair locations. The system continuously refines the repair plan by incorporating information about where new fails are likely to occur, ensuring that final repair locations are both precise and reliable

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

By identifying predicted repair locations that are likely to generate new fail bits, the method deliberately avoids these locations when selecting final repair locations. This preliminary protective action ensures that repair precision is maintained while preventing reliability degradation from new fail bits

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11842788B2Method for determining repair location for redundancy circuit, method for repairing integrated circuit, electronic device and storage medium
Publication Date: 2023.12.12 CHANGXIN MEMORY TECH INC
  • US11842788B2 patent drawing
  • US11842788B2 patent drawing
  • US11842788B2 patent drawing

AI summary

A method and an apparatus for determining a repair location for a redundancy circuit, and a method for repairing an integrated circuit are provided. At least one fail bit of a chip to be repaired is determined. At least one initial repair location for the redundancy circuit is initially assigned according to the at least one fail bit. At least one potential fail line is determined according to the at least one initial repair location. At least one predicted repair location is determined according to the at least one potential fail line. Each of the at least one predicted repair location is a location with a higher probability that a new fail bit appears. At least one final repair location for the redundancy circuit is determined according to the at least one fail bit and the at least one predicted repair location.