IC Signal Line Layout Using Overlapping Vertical Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The miniaturization of integrated circuits leads to stricter design and manufacturing specifications, limiting signal routing flexibility due to reduced horizontal tracks and increased vertical alignment constraints, which affects the efficiency and reliability of circuit designs.
Innovation Solution
Implementing a layout design that includes vertical conducting lines in a second connection layer overlapping with circuit cells and horizontal conducting lines in a first connection layer, with via-connectors to enhance signal routing flexibility by allowing connections across cell boundaries and improving signal routing options.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If miniaturization is implemented to reduce device size and power consumption, then device functionality and integration density are improved, but signal routing flexibility deteriorates due to reduced horizontal tracks and increased vertical alignment constraints
Solution Approach 1:
The patent transitions from traditional planar routing to three-dimensional routing by implementing multiple connection layers (first connection layer with horizontal conducting lines, second connection layer with vertical conducting lines). This dimensional expansion allows signals to route vertically through via-connectors between layers, bypassing the limitation of reduced horizontal tracks and maintaining routing flexibility despite device miniaturization.
Solution Approach 2:
The patent divides the connection structure into segmented layers, with the first connection layer handling horizontal signal distribution and the second connection layer handling vertical signal transitions. This segmentation allows independent optimization of each layer's routing paths, enabling complex signal connections to be achieved through coordinated use of both layers rather than relying solely on limited horizontal tracks in a single layer.
2Adaptability or versatility
If more horizontal tracks are added to increase signal routing options, then signal routing flexibility is improved, but device area and manufacturing complexity increase
Solution Approach 1:
Instead of adding more horizontal tracks in the planar direction, the patent introduces a vertical dimension with a second connection layer. This allows signal routing options to be expanded by routing signals vertically through via-connectors between layers, achieving increased routing flexibility without proportionally increasing the horizontal device area.
Solution Approach 2:
The patent creates dynamic routing paths that can switch between horizontal routing in the first connection layer and vertical routing through the second connection layer. This dynamic approach allows the same physical infrastructure to provide multiple routing options, effectively increasing signal routing flexibility without requiring a proportional increase in device area.
3Manufacturing precision
If vertical alignment constraints are increased to improve manufacturing precision, then manufacturing reliability is improved, but signal routing flexibility deteriorates
Solution Approach 1:
The patent segments the alignment requirements into distinct stages: first, aligning horizontal conducting lines in the first connection layer; second, aligning via-connectors with these horizontal lines; third, aligning vertical conducting lines in the second connection layer with the via-connectors. This segmentation of alignment tasks into manageable stages makes high-precision vertical alignment achievable through systematic manufacturing processes, thereby maintaining signal routing flexibility despite stringent alignment requirements.
Data Source
AI summary
An integrated circuit includes first and second dummy gates extending in a second direction transverse to a first direction, a gate extending in the second direction and arranged between the first and second dummy gates, a first connection layer over the gate and the first and second dummy gates, a second connection layer over the first connection layer, and first and second via-connectors. The first connection layer includes first and second conducting lines extending in the first direction. The second connection layer includes third and fourth conducting lines extending in the second direction. The first via-connector is arranged between and connects the first and third conducting lines. The second via-connector is arranged between and connects the second and fourth conducting lines. The third conducting line overlaps the first dummy gate in a third direction transverse to both the first direction and the second direction.


