Integrated Circuit State Access for In-Run Debug and Fault Injection
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Solution Overview
Problem
Current solutions for performing read and write access operations in integrated circuits, such as programmable logic devices, are often slow, require the application to be stopped, and do not allow direct access to all storage circuits, affecting timing and resource utilization, especially during debug operations or fault injection.
Innovation Solution
A control circuit that can independently perform read and write access operations to storage circuits via configuration resources, enabling independent access modes for debugging, fault injection, and monitoring, using a global control circuit and local control circuits to manage sectors and scan chains for efficient data retrieval and manipulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If read/write access operations are performed through traditional configuration resources, then access to storage circuits is enabled, but the application must be halted and access speed is slow
Solution Approach 1:
The patent segments the control functionality by introducing separate local control circuits in each sector that can operate independently. These local control circuits enable read/write access to storage circuits within their respective sectors without requiring global halting of the application, thus improving access speed while maintaining application productivity.
Solution Approach 2:
The patent introduces local control circuits as intermediary components between the configuration resources and storage circuits. These intermediaries enable direct, fast access to storage circuits during application execution by bypassing the traditional slow configuration interface, resolving the contradiction between access speed and application continuity.
2Ease of operation
If traditional configuration resources are used for access operations, then storage circuits can be accessed, but direct access to all storage circuits is not allowed and timing is affected
Solution Approach 1:
By dividing the integrated circuit into multiple sectors with dedicated local control circuits, the patent enables direct access to specific storage circuits in each sector without affecting other parts of the circuit. This segmentation allows simultaneous access operations in different sectors, eliminating timing delays and improving ease of operation.
Solution Approach 2:
The patent implements local control circuits with specific functionalities tailored to their respective sectors. Each local control circuit is optimized for direct access to its local storage circuits, providing specialized access capabilities that improve ease of operation and reduce access timing losses compared to a uniform global approach.
3Reliability
If external probes are used for monitoring storage circuits, then state observation is enabled, but resource utilization decreases and timing is impacted
Solution Approach 1:
The patent enables storage circuits to monitor and report their own state through local control circuits that can read storage circuit states directly during application execution. This self-service monitoring capability eliminates the need for external probes, improving reliability while maintaining full resource utilization and timing performance.
Data Source
AI summary
In a first mode, a control circuit generates a circuit design implementation with storage circuits in an integrated circuit by programming configuration memory bits via configuration resources. The storage circuits can be accessed for read and write operations during the execution of the circuit design implementation with the integrated circuit. In a second mode, the control circuit can perform read and write access operations at the storage circuits via configuration resources or via an interface circuit and interconnect resources that are allocated to the circuit design implementation. Typical applications for performing access operations at the storage circuits include fault injection and observation, statistical monitoring of the circuit design, initialization and distribution of certain signals including reset signals, event sampling, just to name a few.