IC Test Circuit Using Ring Oscillators for Metal Layer Timing Estimation
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Solution Overview
Problem
As semiconductors become highly integrated and miniaturized, accurately estimating the electrical characteristics of metal layers in integrated circuits is challenging, affecting their performance and requiring improved methods to meet product specifications.
Innovation Solution
An integrated circuit design that includes a test circuit with ring oscillators and machine learning to extract resistance and capacitance values from metal layers, generating clock signals based on these characteristics, allowing for more accurate estimation of timing characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional measurement methods are used for highly integrated and miniaturized semiconductors, then manufacturing process is simple, but measurement precision and reliability of electrical characteristic estimation deteriorate
Solution Approach 1:
The test circuit is segmented into multiple independent ring oscillators, each dedicated to measuring electrical characteristics of specific metal layers. This segmentation allows precise measurement of each layer's characteristics (R, L, C values) while keeping each oscillator's design relatively simple and modular.
Solution Approach 2:
Ring oscillators are introduced as intermediary measurement devices that convert electrical characteristics of metal layers into measurable frequency signals. The oscillators act as mediators between the metal layers and measurement equipment, enabling indirect but accurate measurement of electrical characteristics through frequency analysis.
2Measurement precision
If multiple metal layers are measured individually, then measurement precision improves, but measurement time and productivity deteriorate
Solution Approach 1:
Multiple ring oscillators are merged into a single integrated test circuit that can measure multiple metal layers simultaneously. Each oscillator targets a specific metal layer, but all measurements can be performed in parallel, combining the precision of individual measurements with the speed of simultaneous operation.
Solution Approach 2:
The measurement process uses periodic clock signals generated by ring oscillators to systematically probe different metal layers. The periodic nature of oscillation allows for efficient sequential or parallel measurement of multiple layers through frequency analysis, improving overall measurement productivity.
3Reliability
If conventional testing methods are used, then device complexity is low, but reliability of performance evaluation deteriorates due to inability to accurately estimate timing characteristics
Solution Approach 1:
The test circuit incorporates feedback mechanisms where frequency measurements from ring oscillators are used to extract and analyze electrical characteristics (resistance, inductance, capacitance) of metal layers. This feedback loop enables continuous refinement and accurate estimation of timing characteristics, significantly improving performance evaluation reliability.
Solution Approach 2:
The invention changes the measurement parameter from direct electrical characteristic measurement to frequency-based indirect measurement. By measuring frequency outputs of ring oscillators and converting these to electrical characteristics through analysis, the system achieves higher reliability in timing characteristic estimation while managing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise estimation of electrical characteristics, improving the accuracy of integrated circuit performance evaluation and defect detection by using machine learning to analyze frequencies from ring oscillators.
Implementation Method 1
Each clock signal of the plurality of clock signals has a frequency according to a characteristic of a corresponding metal layer among the first to nth metal layers
Implementation Method 2
extracting a resistance value and a capacitance value of a pattern formed in the specific metal layer by performing machine learning on the frequencies of the test result signals
Data Source
AI summary
An integrated circuit includes first to nth metal layers vertically stacked on a substrate, and a test circuit outputting a test result signal according to a characteristic of each of the first to nth metal layers. The test circuit includes first to nth test circuits for generating a plurality of clock signals. Each clock signal of the plurality of clock signal has a frequency according to a characteristic of a corresponding metal layer among the first to nth metal layers, and n is a natural number.


