Integrated Circuit Wrapper Chain for Core Logic Test Coverage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor integrated circuits increase in performance and integration, the challenge of untested areas arises, particularly due to the limitations of existing scan test technologies, which struggle to effectively test all regions of the chip.
Innovation Solution
The integrated circuit shares register circuits with adjacent core logic circuits to perform test operations on previously untested areas, forming a wrapper chain that isolates and tests these regions, thereby improving test efficiency and coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scan test technology is used to test semiconductor chips, then test coverage can be achieved in traditional areas, but untested areas occur as chip size increases
Solution Approach 1:
The chip is divided into multiple blocks (1st block, target block, 2nd block), each with its own wrapper (1st wrapper, 2nd wrapper, 3rd wrapper, 4th wrapper). This segmentation allows independent testing of each block, ensuring complete coverage even as chip area increases. The wrapper chain connects these segmented blocks systematically.
Solution Approach 2:
Wrapper circuits act as intermediaries between test signals and core logic circuits. The wrapper chain (1st wrapper-2nd wrapper-3rd wrapper-4th wrapper) serves as a mediator to extend test signal reach across the entire chip, enabling test signals to access previously unreachable areas.
2Productivity
If more flip-flops are included to increase integration, then performance and integration improve, but the number of untested areas increases
Solution Approach 1:
Register circuits within wrappers serve multiple functions: they are part of the core logic circuit for normal operation and part of the test structure for testing. The same flip-flops and logic elements are utilized in both modes, eliminating the need for separate test-only structures and ensuring complete coverage of integrated areas.
Solution Approach 2:
The test structure is merged with the core logic structure. Wrapper circuits are integrated alongside core logic circuits, and the wrapper chain combines multiple wrappers into a unified test path. This merging ensures that as integration increases, the test structure scales accordingly without creating untested areas.
3Reliability
If wrapper chains are formed to test all areas, then test coverage improves, but device complexity increases
Solution Approach 1:
The wrapper chain is segmented into modular units (1st wrapper, 2nd wrapper, 3rd wrapper, 4th wrapper), each handling a specific block. This modular segmentation reduces overall complexity by breaking down the large-scale testing problem into manageable, repeatable units that can be systematically connected.
Data Source
AI summary
An integrated circuit includes: (i) a first block containing a first wrapper and a first area of circuit elements isolated by the first wrapper, (ii) a core logic circuit containing a target block, which includes a second wrapper and a second area of circuit elements isolated by the second wrapper, and a third wrapper and a third area of circuit elements isolated by the third wrapper, and (iii) a second block containing a fourth wrapper and a fourth area isolated by the fourth wrapper. The second wrapper is connected in series with the first wrapper, and is configured to support performance of a test operation on the second area. The third wrapper is connected in series with the fourth wrapper, and is configured to support performance of a test operation on the third area.