ICAM Serial-to-Parallel Conversion for Circuit Block Access
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Solution Overview
Problem
Current integrated circuit (IC) testing methods face challenges in accessing and controlling circuit blocks within ICs due to limited access and complex control circuitry, which hinders effective debugging and testing processes.
Innovation Solution
A circuit block access module (ICAM) is introduced on the integrated circuit, capable of extracting serial data into parallel lines, overriding primary control circuitry, and activating/deactivating circuit blocks, using a combination of short and long pulses to enable/disable a decoder for address calls, allowing external test equipment to access and test circuit blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional boundary scan architecture is used to access circuit blocks, then test equipment can access circuit blocks through serial data lines, but the access process is slow and requires multiple pins (TDI, TDO, TCK, TMS, TRST) increasing device complexity
Solution Approach 1:
The patent segments the test access function by separating the serial data input from the parallel data output. The ICAM extracts parallel data from serial input and routes it directly to specific circuit blocks without requiring traditional boundary scan paths through multiple pins. This segmentation allows test access through a simplified pin configuration while maintaining full circuit block accessibility.
Solution Approach 2:
The ICAM acts as an intermediary device between the test equipment and circuit blocks. It receives serial data from a single pin, processes it internally to generate parallel address and data signals, and directly accesses the target circuit blocks. This intermediary function eliminates the need for multiple test pins (TDI, TDO, TCK, TMS, TRST) while maintaining full test capability.
2Adaptability or versatility
If primary control circuitry is used to manage circuit blocks, then normal IC operation is maintained, but test equipment cannot easily override control logic for debugging purposes
Solution Approach 1:
The ICAM implements dynamic control by allowing the test equipment to override the primary control circuitry when needed for testing, while maintaining normal operation during regular IC function. The module can dynamically switch between test mode and normal operation mode, providing adaptability for both debugging and standard functionality without permanent structural changes.
Solution Approach 2:
The ICAM performs preliminary actions by pre-processing the serial test data into parallel address and control signals before they reach the circuit blocks. This preliminary processing bypasses the need for complex real-time control logic during testing, simplifying the overall control circuitry while maintaining full testing capability.
3Productivity
If serial data is converted to parallel data for circuit block addressing, then direct block access is enabled, but additional control logic is required to manage the conversion and overriding functions
Solution Approach 1:
The ICAM merges multiple functions into a single integrated module: serial-to-parallel conversion, address generation, circuit block selection, and control signal routing. By combining these functions that would traditionally require separate control logic units, the patent achieves fast test access while minimizing the overall control logic requirements in the IC.
Solution Approach 2:
The ICAM is designed as a universal module that can access any circuit block within the IC through a single serial input pin. It performs multiple functions including data conversion, address decoding, block selection, and test signal generation, eliminating the need for dedicated control logic for each specific test scenario and improving test access productivity.
Data Source
AI summary
A circuit block access module (ICAM) residing on an integrated circuit and adapted to access a circuit block on the integrated circuit, the module comprising control logic adapted to extract data from a serial data line into two or more parallel data lines, wherein at least one of the parallel data lines is associated with a circuit block address line; and the control logic is further adapted to override or bypass at least a portion of a primary control circuit of said integrated circuit.