IGBT Diode Impurity Profile for Snapback Suppression

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Solution Overview

Problem

The existing semiconductor devices with diode and IGBT regions face issues of voltage/current characteristics deterioration and snapback due to inadequate impurity ion doping, leading to surface irregularities and complex manufacturing processes.

Innovation Solution

The semiconductor devices employ a diode and IGBT region structure with impurity concentration distributions in a curve or constant pattern, ensuring higher concentrations of second conductivity type impurities compared to first conductivity type impurities at all depths, achieved through multiple doping and annealing processes, without altering the substrate surface shape.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If n-type impurity ions are doped to the lower surface of the semiconductor substrate to form a cathode layer, then the voltage/current characteristics improve, but the manufacturing process becomes complex due to the need for multiple doping and annealing steps

Engineering Contradiction:
Improvevoltage/current characteristicsVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cathode layer formation is divided into multiple doping steps with different impurity concentrations. A first doping step introduces n-type impurity ions at a lower concentration, followed by a second doping step that introduces n-type impurity ions at a higher concentration. This segmentation allows control over the impurity concentration profile to achieve both good electrical characteristics and a simplified manufacturing process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first doping step is performed as a preliminary action before the second doping step. By pre-doping the semiconductor substrate with n-type impurity ions at a lower concentration, the subsequent second doping step can focus on creating the high-concentration region needed for the cathode layer, thereby simplifying the overall process while ensuring proper electrical characteristics.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the impurity concentration of n-type impurity ions is increased to compensate for p-type impurity ions, then the VI characteristics improve, but the manufacturing precision decreases due to difficulty in controlling uniform distribution

Engineering Contradiction:
ImproveVI characteristicsVSAvoidimpurity concentration uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The impurity doping process is segmented into two distinct steps with different concentration levels. The first step establishes a baseline n-type impurity concentration, while the second step adds additional n-type impurity ions to achieve the required compensation level. This segmentation makes it easier to control the uniformity of impurity distribution compared to attempting to achieve high concentration in a single doping step.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The impurity concentration parameter is changed in two stages. The first doping step uses a lower concentration parameter, and the second doping step uses a higher concentration parameter. This parameter change approach allows for better control of impurity distribution uniformity while achieving the necessary total impurity concentration for proper VI characteristics.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If a mask is used to cover the cathode layer region during doping, then the impurity distribution control improves, but the manufacturing process complexity increases due to additional masking and etching steps

Engineering Contradiction:
Improveimpurity distribution controlVSAvoidmanufacturing process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The mask and etching steps are extracted (removed) from the manufacturing process. Instead of using a mask to define the cathode layer region during doping, the invention directly dopes the entire lower surface of the semiconductor substrate. This eliminates the need for masking and subsequent etching steps, thereby reducing manufacturing process complexity while still achieving proper impurity distribution through the two-step doping approach.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The conventional approach is inverted: instead of using a mask to prevent doping in certain regions, the invention dopes the entire region and relies on the two-step doping process to create the appropriate concentration profile. This inversion eliminates the need for masking while achieving the desired impurity distribution through parameter control in the doping steps.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses VI characteristics deterioration and snapback occurrences while simplifying the manufacturing process by ensuring reliable impurity concentration profiles across the semiconductor substrate.

Implementation Method 1

p-type impurity ions are doped to the entire lower surface of the semiconductor substrate

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

the impurities are diffused by an annealing process

Methodology Applied
Scientific EffectIon diffusion: Diffusion

Implementation Method 3

the impurities are diffused by an annealing process

Methodology Applied
Scientific EffectThermal diffusion: Diffusion

Data Source

PatentUS9887190B2Semiconductor device and method for manufacturing the same
Publication Date: 2018.02.06 DENSO CORP
  • US9887190B2 patent drawing
  • US9887190B2 patent drawing
  • US9887190B2 patent drawing

AI summary

A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. In the semiconductor device, the diode region includes a second conductivity type cathode layer. An impurity concentration of second conductivity type impurities of the cathode layer is distributed in a curve pattern having at least two peaks, and the impurity concentration of the second conductivity type impurities is higher than that of first conductivity type impurities at all depths of the cathode layer.