IGBT Dual-Gate Resistance Network for Faster Turn-Off
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Solution Overview
Problem
IGBTs face challenges in achieving fast switching operations due to tail current issues, which are exacerbated by the introduction of crystal defects to capture residual carriers, leading to increased leakage currents.
Innovation Solution
The semiconductor device incorporates a resistance network with different resistance values between the main gate and control gate electrodes, allowing for independent timing of gate signals to control the discharge and switching times, enabling faster turn-off of the IGBT without the need for significant changes to the control circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If crystal defects are introduced in the drift region to capture residual carriers, then tail current is reduced, but leakage current increases
Solution Approach 1:
The gate electrode is divided into two separate gates (first gate and second gate) with different functions. The first gate controls the main switching operation, while the second gate specifically manages tail current suppression. This segmentation allows independent optimization of each gate's function without compromising the other, solving the contradiction between tail current reduction and leakage current control.
Solution Approach 2:
A resistor is introduced as an intermediary element connected between the first gate and the second gate. This resistor controls the timing and manner in which the second gate is activated relative to the first gate, enabling precise management of carrier extraction while preventing leakage current. The resistor acts as a mediator that coordinates the interaction between the two gates to achieve both tail current reduction and leakage current suppression.
2Speed
If control gate is turned off before normal gate with different timing signals, then switching speed is improved, but control circuit complexity increases
Solution Approach 1:
The control circuit generates a single composite control signal that simultaneously controls both the first gate and the second gate. This single signal is distributed to both gates through appropriate routing and timing circuits, eliminating the need for separate control circuits for each gate. The merging of control functions into a single signal path reduces control circuit complexity while maintaining the ability to achieve different turn-off timings for the two gates.
Solution Approach 2:
The control circuit is designed to automatically generate the properly timed control signals for both gates as an inherent function of the single control input. The timing relationships between the first gate and second gate are built into the circuit design, so that when a control signal is applied, the gates are activated and deactivated in the correct sequence without requiring external complex timing control. This preliminary arrangement of timing functions simplifies the overall control circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces tail current by controlling the hole carrier density, allowing for high-speed switching of IGBTs with minimal changes to existing IGBTs and control circuits, while maintaining ease of manufacturing and integration.
Implementation Method 1
a first resistor electrically connected between the gate pad and the main gate electrode; and a second resistor electrically connected between the gate pad and the control gate electrode
Data Source
AI summary
A semiconductor device may include: a drift region of a first conductivity type; a base region of a second conductivity type arranged on the drift region; an emitter region of the first conductivity type arranged on the base region; a field stop region of the first conductivity type arranged in contact with the drift region; a collector region of the second conductivity type in contact with the field stop region; a main gate electrode electrically insulated from the base region and the collector region; a control gate electrode electrically insulated from the base region and the collector region; a gate pad on the drift region; a first resistor electrically connected between the gate pad and the main gate electrode; and a second resistor electrically connected between the gate pad and the control gate electrode. A resistance value of the first resistor may be greater than the second resistor thereof.