IGBT Isolation Structure with Dual Trenches for Fast Switch-On
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Solution Overview
Problem
The integration of a diode with an insulated gate bipolar transistor (IGBT) in power semiconductor devices often results in a slow switch-on response due to the formation of an inversion channel that grounds the p-doped region, increasing input/gate capacitance and requiring more time to complete the switch-on process.
Innovation Solution
A semiconductor device with a charge carrier compensation region and an isolation structure comprising a first and second trench, where the charge carrier compensation region extends to the second trench but not the first, electrically isolating it from the diode region's anode potential, preventing the inversion channel from connecting and maintaining the p-doped region as floating during switch-on.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the p-doped region is continuous between IGBT and diode cells, then manufacturing is simplified, but the switch-on speed decreases due to inversion channel formation
Solution Approach 1:
The patent introduces a dual-trench isolation structure that segments the continuous p-doped region into electrically isolated sections. The first and second trenches create discrete isolation zones between IGBT and diode cells, preventing the formation of continuous inversion channels while maintaining manufacturing feasibility through standardized trench formation processes.
Solution Approach 2:
The patent introduces an intermediate n-type doped region between the p-doped region and the diode anode region. This intermediate layer acts as a barrier that prevents charge carrier exchange and inversion channel formation, while allowing the p-doped region to maintain its protective function for the gate trench dielectric.
2Reliability
If the p-doped region is electrically connected to ground, then reliability is improved, but the input capacitance increases and switch-on time increases
Solution Approach 1:
The patent applies different electrical characteristics to different regions: the p-doped region maintains grounding connections in the IGBT area for reliability, while the isolation trenches create locally isolated regions near the diode interface where the p-doped region remains floating. This local differentiation allows simultaneous achievement of protection and fast switching.
Solution Approach 2:
The patent segments the electrical connectivity of the p-doped region through the dual-trench isolation structure. One side of the isolation structure maintains grounding for reliability, while the other side creates electrical isolation to prevent capacitance increase and maintain fast switch-on performance.
3Device complexity
If a single trench isolation structure is used, then device complexity is reduced, but electrical isolation between IGBT and diode regions is insufficient
Solution Approach 1:
The patent divides the isolation function into two separate trenches: a first trench for basic isolation and a second trench for enhanced electrical decoupling. This segmentation of the isolation function provides superior electrical isolation compared to a single trench, while maintaining reasonable structural complexity through systematic layout.
Solution Approach 2:
The patent enhances isolation by adding a dimensional aspect to the trench structure. The dual-trench configuration creates a more comprehensive isolation barrier in the lateral dimension, effectively blocking electrical coupling paths that a single trench cannot prevent.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves electrical decoupling between IGBT and diode cells, ensuring the IGBT turns on at its designed speed by preventing the inversion channel from grounding the p-doped region, thus enhancing the switch-on response.
Implementation Method 1
a charge carrier compensation region configured to expel or admit drift zone minority charge carriers based on an on-state or an off-state of the plurality of IGBT cells
Implementation Method 2
an isolation structure between the transistor region and the diode region, the isolation structure comprising a first trench extending lengthwise along at least part of a periphery of the diode region and a second trench interposed between the first trench and the transistor region
Data Source
AI summary
According to an embodiment of a semiconductor device, the device includes a semiconductor substrate having a transistor region and a diode region. The transistor region includes a plurality of IGBT cells, and a charge carrier compensation region configured to expel or admit drift zone minority charge carriers based on an on-state or an off-state of the IGBT cells. The diode region includes a plurality of diode cells. An isolation structure is provided between the transistor region and the diode region. The isolation structure includes a first trench extending lengthwise along at least part of a periphery of the diode region and a second trench interposed between the first trench and the transistor region. The charge carrier compensation region extends to the second trench of the isolation structure but not the first trench such that the charge carrier compensation region is electrically isolated from an anode potential of the diode region.