IGBT Gate Structure for Self-Turn-On Suppression
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Solution Overview
Problem
Insulated gate bipolar transistors (IGBTs) face the issue of self-turn-on due to low input capacitance, which can lead to device damage from gate noise when transistors are turned on simultaneously, especially in inverter applications.
Innovation Solution
The introduction of a planar gate on a first body region and an additional second trench gate, both located in the floating region, increases the input capacitance while minimizing feedback capacitance, thereby preventing self-turn-on without requiring structural changes to the active region. The second trench gate is formed at a shallower depth than the first trench gate, and both are created simultaneously with the first trench gates to maintain process efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trench gate is formed at the boundary between floating region and active region, then the transistor can be manufactured with conventional structure, but the input capacitance is small causing self-turn-on due to gate noise
Solution Approach 1:
The gate structure is segmented into two distinct types: first trench gates formed at the boundaries between floating region and active region, and second trench gates formed within the floating region. This segmentation allows the input capacitance to be increased through the additional second trench gates while maintaining the functional separation of regions, thereby preventing self-turn-on without compromising the overall device architecture.
Solution Approach 2:
The gate structure is extended into the vertical dimension by forming trench gates that penetrate through the drift region. The second trench gates are positioned at different depths within the floating region compared to the first trench gates, creating a multi-level gate architecture that increases input capacitance through three-dimensional electrode arrangement rather than simply expanding the planar gate area.
2Reliability
If additional trench gates are formed to increase input capacitance, then self-turn-on is prevented, but the manufacturing process becomes more complex
Solution Approach 1:
The formation of first trench gates and second trench gates is merged into a single manufacturing process step. By using a unified trench formation process that simultaneously creates both types of trenches, the patent avoids the need for separate etching and processing steps, thereby maintaining manufacturing simplicity while achieving the dual functionality of region separation and input capacitance enhancement.
Solution Approach 2:
The second trench gates serve multiple functions: they increase the input capacitance to prevent self-turn-on, and they are positioned to minimize feedback capacitance between collector and gate. This multi-functionality allows a single structural modification to address multiple performance issues simultaneously, simplifying the overall device design and manufacturing approach.
3Reliability
If second trench gate is formed at shallower depth, then feedback capacitance is minimized, but input capacitance increase is reduced
Solution Approach 1:
The second trench gates are positioned with their lowermost surfaces within the floating region at specific depths that are shallower than the first trench gates. This localized positioning creates a spatial gradient in the gate structure: the upper portions (second trench gates) are optimized for minimizing feedback capacitance by being closer to the gate electrode, while the lower portions (first trench gates) extend deeper to maintain input capacitance. This local quality differentiation allows simultaneous optimization of both capacitance parameters.
Data Source
AI summary
Disclosed are an insulated gate bipolar transistor and a method of manufacturing the same. More particularly, an insulated gate bipolar transistor and a method of manufacturing the same include a planar gate on a drift region or a first body region in a floating region of the insulated gate bipolar transistor, and if desired or necessary, a second trench gate in the first body region to increase an input capacitance (Cies) and prevent self-turn-on of the insulated gate bipolar transistor.


