IGBT with Integrated SCR for Low Trigger ESD Protection
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Solution Overview
Problem
Existing electrostatic discharge (ESD) protection elements, such as silicon controlled rectifiers (SCRs), face challenges in achieving a low trigger voltage to effectively protect integrated circuits from voltage overshoot while withstanding high current levels without being damaged.
Innovation Solution
The integration of a bipolar device portion with a Metal Oxide Semiconductor (MOS) Field Effect Transistor (FET) device portion forms an Isolated Gate Bipolar Transistor (IGBT) with an integrated SCR, utilizing a configuration that includes coupling the base region of the bipolar device with the drain region of the MOSFET to create a device capable of fast triggering and low transient overshoots during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon controlled rectifier (SCR) is used for ESD protection, then the device can withstand high current levels and provide low voltage clamping, but the trigger voltage is typically too high to effectively protect the associated circuit
Solution Approach 1:
The patent combines a bipolar device portion with a MOSFET device portion to form an integrated ESD protection device. The bipolar device provides high current handling capability while the MOSFET provides low trigger voltage, merging their advantages to resolve the contradiction between high current withstand capability and low trigger voltage requirement.
Solution Approach 2:
The patent introduces a coupling mechanism that connects the base region of the bipolar device with the drain region of the MOSFET. This coupling acts as an intermediary that enables the MOSFET to trigger the bipolar device at low voltages while maintaining high current handling capability, effectively mediating between the two device portions.
2Speed
If the bipolar device base region is coupled with the MOSFET drain region, then fast triggering and low transient overshoots are achieved, but the device structure becomes more complex
Solution Approach 1:
The patent merges the bipolar device and MOSFET into a single integrated structure where the base region of the bipolar device is directly coupled with the drain region of the MOSFET. This merging eliminates the need for separate triggering circuits and reduces overall device complexity while achieving fast triggering.
3Reliability
If ESD current is sunk through the PNP device and parallel SCR, then the failure threshold increases and voltage clamping improves, but the current handling requirements increase the stress on the device
Solution Approach 1:
The patent segments the ESD current path into multiple parallel paths: one through the PNP device and another through the parallel SCR. This segmentation distributes the current stress across multiple devices, reducing the burden on each individual device while maintaining high failure threshold and effective voltage clamping.
Data Source
AI summary
This disclosure relates to devices and methods relating to coupled first and second device portions.


