IGBT Trench-Gate Device With Segmented Gate Electrodes
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Solution Overview
Problem
Insulated gate bipolar transistors (IGBTs) face destruction and increased switching loss due to current concentration at the end of the cell region during turn-off operations, as carriers spread to termination regions without adequate discharge paths.
Innovation Solution
Incorporating a cell end region with a second trench and gate electrode, and optimizing the structure with additional trenches and emitter regions to manage carrier distribution and provide discharge paths, reducing current density and switching losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If carriers are allowed to spread to termination region during on state, then the IGBT can operate in on state, but current concentration occurs at cell end region during turn-off causing destruction
Solution Approach 1:
The gate electrode is segmented into multiple regions (first gate electrode region connected to first gate pad, second gate electrode region connected to second gate pad) that can be independently controlled. This allows selective turn-off of cells adjacent to termination region before turning off the entire device, preventing current concentration at cell ends during turn-off operation.
Solution Approach 2:
The invention applies preliminary action by turning off the IGBT cells adjacent to the termination region (second gate electrode region) before turning off the main cell region (first gate electrode region). This preliminary discharge of carriers from the cell end region prevents harmful current concentration during the overall turn-off process.
2Device complexity
If single gate electrode structure is used, then device structure is simple, but carrier discharge path is insufficient causing current concentration
Solution Approach 1:
The gate electrode is divided into multiple independent regions (first gate electrode region and second gate electrode region) that can be controlled separately through different gate pads. This segmentation creates multiple independent carrier discharge paths, allowing selective emptying of carriers from different regions of the semiconductor device.
Solution Approach 2:
The invention introduces an intermediary structure (second gate electrode region and associated trenches) between the main cell region and termination region. This intermediary region acts as a buffer that can be independently controlled to manage carrier discharge from the cell end region, preventing direct current concentration at the termination boundary.
3Productivity
If carriers concentrate at cell end region during turn-off, then turn-off operation completes, but switching loss increases
Solution Approach 1:
The invention performs preliminary action by discharging carriers from the cell end region (second gate electrode region) before turning off the main cell region. This preliminary discharge prevents carrier concentration at the cell ends, thereby reducing switching losses while maintaining fast turn-off performance of the overall device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents IGBT destruction by reducing current concentration and minimizing switching losses during turn-off operations by effectively managing carrier discharge through optimized trench and gate electrode configurations.
Implementation Method 1
a positive voltage higher than a threshold voltage is applied to the gate electrode to form a channel in the p-type base region
Data Source
AI summary
A semiconductor device according to an embodiment includes a semiconductor layer having a first plane and a second plane; an emitter electrode provided on a first plane side of the semiconductor layer; a collector electrode provided on a second plane side of the semiconductor layer; a first gate electrode pad provided on the first plane side; a second gate electrode pad provided on the first plane side; a cell region including a first trench provided in the semiconductor layer and a first gate electrode that is provided in the first trench and is connected to the first gate electrode pad; and a cell end region that is adjacent to the cell region and includes a second trench provided in the semiconductor layer and a second gate electrode which is provided in the second trench and is connected to the second gate electrode pad.


