IGZO Thin Film Transistor Interconnect Layer Design
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Solution Overview
Problem
Conventional IGZO thin film transistors face issues with low etching selectivity during manufacturing, ion bombardment damage from dry etching, and hot-carrier injection, leading to leakage currents and mobility degradation.
Innovation Solution
A thin film transistor design where the semiconductor layer is not in contact with the source and drain electrodes, instead being connected through interconnect layers made of conductive metal-oxide materials, and a two-step etching process is used to pattern the electrodes, with a dielectric layer optionally added to support the semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dry etching process is employed to form source/drain electrodes, then manufacturing precision is improved, but ion bombardment damages the semiconductor layer back channel
Solution Approach 1:
A buffer layer is introduced as an intermediary between the semiconductor layer and the source/drain electrodes. This buffer layer absorbs the ion bombardment damage during dry etching of the electrodes, protecting the semiconductor layer's back channel from direct ion impact while still allowing the dry etching process to achieve precise electrode patterning.
Solution Approach 2:
The structure is segmented into distinct layers: the semiconductor layer, the buffer layer, and the source/drain electrodes. This segmentation isolates the semiconductor layer from direct exposure to ion bombardment during electrode formation, allowing the dry etching process to be applied to the electrodes without damaging the semiconductor layer.
2Reliability
If source/drain electrodes are formed in contact with IGZO semiconductor layer, then electrical connection is achieved, but hot-carrier injection degrades mobility
Solution Approach 1:
The buffer layer serves as an intermediary between the IGZO semiconductor layer and the metallic source/drain electrodes. It provides the necessary electrical connection while reducing the hot-carrier injection effect that would otherwise directly impact the semiconductor layer, thereby preserving carrier mobility.
Solution Approach 2:
The buffer layer changes the electrical parameters at the interface between the semiconductor and electrodes. By introducing this intermediate layer with specific electrical properties, the hot-carrier injection parameters are modified, reducing the degradation of mobility while maintaining adequate electrical connection.
3Manufacturing precision
If wet etching process is used, then etching selectivity is improved, but manufacturing control becomes difficult
Solution Approach 1:
The buffer layer acts as an intermediary that enables the use of dry etching with high selectivity. By providing a distinct layer with different etching characteristics, it allows the etching process to selectively remove material at the electrode-semiconductor interface without compromising overall process control or requiring wet etching.
Data Source
AI summary
Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.