III-Nitride FET Undercoat Layer for Contact Resistance
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Solution Overview
Problem
The AlGaN/GaN FET structure faces challenges with high contact resistance, current collapse, and short channel effects due to its large bandgap and oxidizable Al surface, which degrade high-power operation and frequency characteristics.
Innovation Solution
A wurtzite type III-nitride semiconductor FET with an undercoat layer having a larger lattice constant and bandgap than the carrier travel layer is used, reducing contact resistance and maintaining two-dimensional electron gas proximity, thereby suppressing short channel effects and improving pinch-off characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If AlGaN/GaN hetero structure is used to supply carriers via piezo-charges, then high power capability is achieved, but contact resistance cannot be lowered to 1e-6 Ωcm2 or less
Solution Approach 1:
The patent segments the semiconductor structure into multiple functional layers: AlN nucleation layer, AlGaN barrier layer, GaN carrier travel layer, and AlGaN cap layer. This segmentation allows each layer to perform its specific function optimally, with the GaN layer providing low contact resistance surface and AlGaN layers providing high breakdown voltage and carrier supply.
Solution Approach 2:
Different layers are assigned different material compositions and properties tailored to local requirements: the GaN layer at the surface provides low Schottky barrier height for low contact resistance, while AlGaN layers provide high bandgap for high breakdown voltage and piezoelectric carrier supply in the bulk region.
2Strength
If AlGaN layer is used as outermost surface, then high breakdown voltage is achieved, but current collapse increases due to oxidizable Al
Solution Approach 1:
Instead of placing AlGaN as the outermost layer to achieve high breakdown voltage, the patent inverts the structure by placing GaN as the outermost layer. This inversion eliminates Al oxidation at the surface (reducing current collapse) while maintaining high breakdown voltage through properly designed AlGaN layers beneath the surface.
Solution Approach 2:
The patent uses a composite structure combining GaN and AlGaN layers, where GaN provides oxidation-resistant surface properties and AlGaN provides high breakdown voltage and piezoelectric carrier supply, achieving both reliability and strength.
3Speed
If gate length is reduced to 0.3 micrometers or less for high frequency operation, then speed is improved, but short channel effect becomes considerable
Solution Approach 1:
The patent changes the material composition parameter of the cap layer to AlGaN with optimized Al content, which modifies the electric field distribution and carrier confinement characteristics, allowing short channel effect suppression even at reduced gate lengths for high frequency operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces contact resistance, suppresses current collapse, and enhances high-frequency performance by inducing a reverse HEMT structure with lower Schottky barrier heights and improved breakdown voltage.
Implementation Method 1
an undercoat layer having an average lattice constant greater than that of a carrier travel layer... is provided to a side of the carrier travel layer facing a substrate
Implementation Method 2
a band gap greater than that of the carrier travel layer is provided... two-dimensional electron gas can stay at a side of the carrier travel layer facing the undercoat layer by a barrier of the undercoat layer
Implementation Method 3
ohmic electrodes contact the carrier travel layer having the lower Schottky barrier height... gate electrode in Schottky contact directly or via another layer
Data Source
AI summary
Provided is a semiconductor device that can reduce the contact resistance, has a small current collapse, and can improve the pinch-off characteristic upon a high-frequency operation. A field effect transistor using a wurtzite (having (0001) as the main plane) type III-nitride semiconductor includes: a substrate (101); an undercoat layer (103) of a first III-nitride semiconductor; and a carrier travel layer (104) of a second III-nitride semiconductor. The undercoat layer (103) (101) and the carrier travel layer (104) is formed on the substrate in this order. The field effect transistor includes source/drain electrodes (105, 106) in ohmic contact, and a gate electrode (107) in Schottky contact directly or via another layer on the carrier travel layer (104). The undercoat layer (103) has an average lattice constant greater than that of the carrier travel layer (104) and a band gap greater than that of the carrier travel layer (104).


