III-V Semiconductor Buffer Layer With Localized Si C Doping

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Solution Overview

Problem

Forming a semiconductor layer with good surface flatness is a challenge in producing semiconductor devices like light-receiving devices for infrared radiation, particularly when using III-V group compound semiconductors.

Innovation Solution

A semiconductor stack with a buffer layer composed of III-V group compound semiconductor, featuring a high-concentration region of Si and C adjacent to the substrate, which facilitates good surface flatness and crystallinity, is used on a substrate of the same material, and the active layer includes Sb as a group V element.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a buffer layer is formed on a III-V group compound semiconductor substrate to improve surface flatness, then the surface flatness of the buffer layer is improved, but the manufacturing complexity increases due to the need for high-concentration Si and C regions

Engineering Contradiction:
Improvesurface flatnessVSAvoidbuffer layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The buffer layer is designed with a high-concentration region containing Si and C that is localized adjacent to the substrate, rather than uniformly distributed throughout the entire buffer layer. This local concentration of dopants provides the necessary surface flatness improvement at the interface while keeping the rest of the buffer layer simpler and maintaining good crystallinity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes the concentration parameter of Si and C dopants by creating a high-concentration region adjacent to the substrate. By controlling the spatial distribution and concentration of these dopants, the surface flatness is improved without compromising the overall crystalline quality of the buffer layer and active layer.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If an active layer containing Sb is formed on a buffer layer, then the light-receiving sensitivity for mid-infrared light is improved, but the crystallinity of the active layer deteriorates if the buffer layer surface is not sufficiently flat

Engineering Contradiction:
Improvelight-receiving sensitivityVSAvoidcrystallinity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The high-concentration Si and C region is formed in the buffer layer adjacent to the substrate before the active layer is deposited. This preliminary action of creating a flat surface region in advance provides a stable foundation that ensures good crystallinity of the subsequent active layer containing Sb, thereby enabling high light-receiving sensitivity without crystallinity deterioration.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a high-concentration region of Si and C is formed in the buffer layer adjacent to the substrate, then the surface flatness is improved, but the total concentration of dopants increases

Engineering Contradiction:
Improvesurface flatnessVSAvoidtotal concentration of Si and C
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

Instead of uniformly distributing Si and C dopants throughout the entire buffer layer, the invention concentrates them in a specific high-concentration region adjacent to the substrate. This localized approach improves surface flatness where it is most needed while minimizing the total quantity of dopants required, thus avoiding excessive doping in other regions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9929301B2Semiconductor stack and semiconductor device
Publication Date: 2018.03.27 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US9929301B2 patent drawing
  • US9929301B2 patent drawing
  • US9929301B2 patent drawing

AI summary

A semiconductor stack includes a substrate composed of a III-V group compound semiconductor, a buffer layer that is arranged on the substrate and that is composed of a III-V group compound semiconductor, and an active layer that is arranged on the buffer layer and that includes a layer composed of a III-V group compound semiconductor containing Sb as a group V element. A region of the buffer layer including a main surface of the buffer layer adjacent to the substrate includes a high-concentration region having a high total concentration of Si and C compared with another adjacent region.