Image Sensor Doped Transfer Gate Dark Current Reduction
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Solution Overview
Problem
High doping levels in source/drain implant regions of image sensors cause lattice damage and increased dark current due to the high conductivity requirements, which can lead to metallic contaminant gettering and adverse effects on transfer gate operation.
Innovation Solution
Forming implant regions only in a portion of the transfer gates during the source/drain implantation process, using a masking conformal dielectric layer to prevent dopant implantation in the charge-to-voltage conversion regions, thereby avoiding lattice damage and reducing dark current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high doping level is used in source/drain implant regions to maintain high conductivity, then transfer gate conductivity is improved, but lattice damage occurs and dark current increases
Solution Approach 1:
The patent applies local quality by differentiating the doping treatment between two specific regions: the transfer gate region receives heavy doping to ensure high conductivity, while the charge-to-voltage conversion region is protected from doping through a masking layer, preventing lattice damage and dark current generation in that critical area
Solution Approach 2:
The patent segments the implantation process into two distinct steps: first forming the transfer gate structure, then using a masking conformal dielectric layer to selectively protect the charge-to-voltage conversion region during subsequent doping steps, allowing independent optimization of each region's electrical properties
2Reliability
If heavy source/drain implant is performed to form doped region in transfer gates, then transfer gate work function is improved, but charge-to-voltage conversion region suffers from implant damage
Solution Approach 1:
The patent introduces a masking conformal dielectric layer as an intermediary protective element that is deposited over the charge-to-voltage conversion region before doping. This masking layer acts as a barrier that prevents dopant atoms from reaching and damaging the charge-to-voltage conversion region while allowing the transfer gate to be properly doped
3Ease of operation
If doping is performed to increase transfer gate conductivity, then electrical operation is improved, but metallic contaminants are gettered and dark current increases
Solution Approach 1:
The patent extracts or removes the harmful effect of doping from the charge-to-voltage conversion region by using the masking conformal dielectric layer to prevent dopant implantation in that specific area, thereby eliminating the gettering of metallic contaminants and the associated dark current generation while preserving the necessary doping in the transfer gate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the charge-to-voltage conversion gain and sensitivity by eliminating lattice defects and dark current issues while maintaining transfer gate functionality.
Implementation Method 1
using a masking conformal dielectric layer to prevent dopant implantation in the charge-to-voltage conversion regions
Implementation Method 2
At least a portion of each transfer gate 116 is also implanted with dopants during the source/drain implant to form doped region 122
Data Source
AI summary
An image sensor includes an array of pixels, with at least one pixel including a photodetector formed in a substrate layer and a transfer gate disposed adjacent to the photodetector. The substrate layer further includes multiple charge-to-voltage conversion regions. A single photodetector can transfer collected charge to a single charge-to-voltage conversion region, or alternatively multiple photodetectors can transfer collected charge to a common charge-to- voltage conversion region shared by the photodetectors. An implant region formed when dopants are implanted into the substrate layer to form source/drain implant regions is disposed in only a portion of each transfer gate while each charge-to-voltage conversion region is substantially devoid of the implant region.