Image Sensor Interconnect Layout for Low-Capacitance Signal Readout
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Solution Overview
Problem
As image sensors become more integrated, the arrangement and shape of components in the pixel lead to image transmission delays, deteriorating the quality of high-density integration image sensors.
Innovation Solution
The image sensor design includes a substrate region with a photoelectric conversion region and a floating diffusion region, along with first and second horizontal conductive lines at different heights, where the first line is thinner and connected to the floating diffusion region, and the second line is thicker and configured for high-speed signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If image sensor integration density is increased, then more pixels can be packed into the sensor, but image transmission delays increase and quality deteriorates
Solution Approach 1:
The patent applies three-dimensional stacking architecture where photodetectors, transfer gates, and readout circuits are arranged in multiple layers vertically. This dimensional transition from planar to volumetric integration allows higher pixel density without increasing lateral component density, thereby maintaining signal transmission speed while increasing integration capacity.
Solution Approach 2:
The pixel structure is segmented into functionally independent modules: photodetector region, transfer gate region, and readout circuit region, each optimized separately. This segmentation allows independent optimization of signal generation and readout pathways, reducing transmission delays while maintaining high integration density through modular arrangement.
2Reliability
If conductive line thickness is increased for high-speed signal transmission, then signal transmission quality improves, but capacitance between conductive lines increases
Solution Approach 1:
Conductive lines are designed with locally optimized thickness: thicker in regions requiring high-speed signal transmission and thinner in regions where capacitance would be problematic. This spatially varying thickness profile allows simultaneous optimization of signal transmission quality and capacitance management through region-specific design parameters.
Solution Approach 2:
The patent utilizes vertical layering to separate high-speed signal conductors from other conductive elements in the third dimension. By routing high-speed signals through dedicated upper layers and placing lower-capacitance conductors in lower layers, the design reduces parasitic capacitance while maintaining excellent signal transmission characteristics through dimensional separation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces capacitance between conductive lines, improving high-speed signal transmission characteristics and enhancing the overall quality of the image sensor by minimizing delays and noise.
Implementation Method 1
a substrate region having therein a photoelectric conversion region and a floating diffusion region, which receives charges generated in the photoelectric conversion region
Data Source
AI summary
An image sensor includes a substrate region having a photoelectric conversion region and a floating diffusion region therein. The floating diffusion region is configured to receive charges generated in the photoelectric conversion region in response to light incident the photoelectric conversion region. First and second horizontal conductive lines are provided that extend on the substrate region, but at different heights relative to a surface of the substrate region. The first horizontal conductive line is electrically connected to the floating diffusion region and has a thickness smaller than a thickness of the second horizontal conductive line. In addition, the first horizontal conductive line extends closer to the substrate region than the second horizontal conductive line.