Image Sensor Pad Region Isolation Structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of image sensors leads to reduced photodiode sizes, causing manufacturing difficulties and sensitivity deterioration due to step differences between pixel and pad regions.
Innovation Solution
The design includes a semiconductor substrate with a pixel region, a pad region, photoelectric conversion regions, an interconnect structure, a pad structure, a through via structure, and an isolation structure that surrounds the pad and via structures, preventing step differences and maintaining sensitivity by ensuring adequate electrical insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration of image sensor increases, then photodiode size is reduced, but manufacturing becomes difficult and sensitivity deteriorates
Solution Approach 1:
The image sensor is divided into distinct pixel region and pad region with separate depth levels. The pixel region maintains its original depth while the pad region is formed at a lower depth, creating spatial segmentation that allows independent optimization of each region for manufacturing and performance.
Solution Approach 2:
The pad region is positioned at a different depth dimension compared to the pixel region. By creating a stepped structure where the pad region extends lower than the pixel region, the patent adds a vertical dimension to the layout, allowing higher integration without compromising manufacturing precision.
2Productivity
If integration of image sensor increases, then photodiode size is reduced, but sensitivity deteriorates
Solution Approach 1:
The image sensor is divided into distinct pixel region and pad region with separate depth levels. The pixel region maintains its original depth while the pad region is formed at a lower depth, creating spatial segmentation that allows independent optimization of each region for manufacturing and performance.
Solution Approach 2:
Different regions of the image sensor are given different depth qualities - the pixel region maintains full depth for optimal light sensitivity, while the pad region is positioned at a lower depth. This local differentiation ensures that the pixel region's sensitivity is preserved while allowing increased integration.
3Reliability
If pad structure is formed on rear surface, then electrical connection is achieved, but step difference is generated
Solution Approach 1:
The pad region is positioned at a different depth dimension compared to the pixel region. By creating a stepped structure where the pad region extends lower than the pixel region, the patent adds a vertical dimension to the layout, allowing the pad structure to be formed on the rear surface while managing the step difference through intentional depth differentiation.
Solution Approach 2:
The image sensor is divided into distinct pixel region and pad region with separate depth levels. The pixel region maintains its original depth while the pad region is formed at a lower depth, creating spatial segmentation that allows independent optimization of each region for manufacturing and performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the sensitivity and compactness of the image sensor while preventing patterning defects during manufacturing, allowing for improved performance without sensitivity loss.
Implementation Method 1
a plurality of photoelectric conversion regions in the pixel region
Data Source
AI summary
An image sensor includes a semiconductor substrate including a pixel region and a pad region, a plurality of photoelectric conversion regions in the pixel region, an interconnect structure on a front surface of the semiconductor substrate, a pad structure in the pad region and on a rear surface of the semiconductor substrate, a through via structure in the pad region and electrically connected to the interconnect structure through the semiconductor substrate, and an isolation structure at least partially extending through the pad region of the semiconductor substrate from the rear surface of the semiconductor substrate. The isolation structure surrounds the pad structure and the through via structure in a plane extending parallel to the rear surface of the semiconductor substrate.


