Image Sensor Pixel Layout With Shared Transistors for Multi-Gain HDR
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Solution Overview
Problem
As image sensors continue to miniaturize, it becomes challenging to incorporate multi-gain functions into traditional pixel structures, limiting the High Dynamic Range (HDR) performance of image sensors.
Innovation Solution
The image sensor design includes multiple pixel blocks with shared reset and select transistors, allowing for multi-gain functionality by controlling the capacitance of the floating diffusion active region, thereby enabling HCG, DCG, and TCG modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the traditional 4T pixel structure is used for miniaturization, then the pixel size can be reduced, but it becomes difficult to add multi-gain functions which limits HDR performance
Solution Approach 1:
The patent merges the reset transistor and select transistor into a shared structure between adjacent pixel blocks. Specifically, the reset transistor's first terminal is connected to the drain of the gain control transistor, and the select transistor shares the same control terminal and connection nodes, reducing the total transistor count per pixel while maintaining multi-gain functionality through the gain control transistor's ability to switch between different gain modes
Solution Approach 2:
The gain control transistor serves multiple functions: it acts as a switch for different gain modes (HCG, DCG, TCG), functions as part of the reset circuitry when combined with the shared reset transistor, and enables the pixel to adapt to different lighting conditions. This multi-functional design allows the miniaturized pixel to maintain HDR performance with fewer transistors
2Adaptability or versatility
If more transistors are added to achieve multi-gain functions in miniaturized pixels, then HDR performance improves, but the pixel area increases
Solution Approach 1:
Adjacent pixel blocks share the reset transistor and select transistor, effectively reducing the per-pixel transistor count. The shared reset transistor is controlled by a common reset control signal, and the shared select transistor outputs signals through a common node, allowing multi-gain functionality without proportionally increasing pixel area
Solution Approach 2:
The gain control transistor dynamically switches between different gain modes (HCG, DCG, TCG) based on lighting conditions, allowing the pixel to adapt its performance characteristics without requiring separate hardware for each mode. This dynamic switching enables multi-gain functionality within a fixed, compact pixel structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances the dynamic range of the image sensor, achieves multiple gain functions with fewer transistors, and addresses the need for double or triple conversion gains for shrinking pixels, while maintaining symmetrical layout and short interconnecting metal lines for improved image quality.
Implementation Method 1
The photosensitive unit is connected between a floating diffusion active region and a first reference voltage
Data Source
AI summary
An image sensor, a layout structure, and a control method are provided. The image sensor includes multiple pixel blocks arranged in rows and columns. Each pixel block includes: at least one photosensitive unit connected between a floating diffusion active region and a first reference voltage; a reset transistor with a control terminal and a second terminal; a gain control transistor with a control terminal, a first terminal, and a second terminal; a source follower transistor with a control terminal and a second terminal; a select transistor with a control terminal, a first terminal, and a second terminal. Two adjacent pixel blocks in the same column share the same select transistor and the same reset transistor, or two groups each composed of two adjacent pixel blocks in three adjacent pixel blocks in the same column share the same select transistor and the same reset transistor, respectively.