Image Sensor Side Connection Contact for Conversion Gain

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Solution Overview

Problem

Image sensors face challenges with low conversion gain and image lag due to issues related to the size and efficiency of pixel regions, particularly in highly integrated semiconductor devices.

Innovation Solution

The implementation of a side connection contact that overlaps with a device isolation layer in image sensors, which helps in reducing the area of the floating diffusion region and increasing the size of transfer gates, thereby improving conversion gain and signal-to-noise ratio while addressing image lag issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the pixel region size is increased to improve conversion gain, then the conversion gain is improved, but the device integration density deteriorates

Engineering Contradiction:
Improveconversion gainVSAvoidintegration density
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The contact structure extends vertically through multiple layers (first device isolation layer, second device isolation layer, third device isolation layer) to connect the floating diffusion region to external circuits. This three-dimensional contact approach allows larger pixel regions without increasing lateral footprint, thereby maintaining high integration density while improving conversion gain.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The device isolation structure is divided into multiple layers (first, second, and third device isolation layers) with different materials and functions. This segmentation allows optimized electrical isolation and mechanical support without constraining the pixel region size, enabling improved conversion gain while maintaining device integration.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the transfer gate size is increased to reduce image lag, then the image lag is reduced, but the pixel region area increases

Engineering Contradiction:
Improveimage lagVSAvoidpixel region area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The contact structure utilizing multiple device isolation layers enables vertical current flow paths that are independent of the lateral pixel region dimensions. This allows transfer gates to be optimized for reducing image lag without proportionally increasing the pixel area, as the contact efficiency is enhanced through the multi-layer isolation structure rather than lateral expansion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the performance of image sensors by improving conversion gain, signal-to-noise ratio, and efficiently utilizing pixel regions, reducing random telegraph noise and image lag.

Implementation Method 1

a photoelectric conversion layer disposed in the pixel region

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS10192910B2Image sensor
Publication Date: 2019.01.29 SAMSUNG ELECTRONICS CO LTD
  • US10192910B2 patent drawing
  • US10192910B2 patent drawing
  • US10192910B2 patent drawing

AI summary

An image sensor including first and second pixel regions adjacent to each other in a first direction in a light-receiving region that receives light and generates charges; a third pixel region adjacent to the first pixel region in a second direction intersecting the first direction in the light-receiving region; a first device isolation layer between the first and second pixel regions and between the first and third pixel regions to separate the first pixel region from the second pixel region and the first pixel region from the third pixel region; second device isolation layers in each of the first to third pixel regions to define active regions; a plurality of transfer gates and a plurality of logic gates on the active regions; and a side connection contact overlapping the first device isolation layer and connected to a side surface of an active region.