Image Sensor Through-Via Mark Pattern for Opening Verification
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Solution Overview
Problem
Existing image sensors and semiconductor devices face reliability issues due to incomplete openings in through via holes during manufacturing, leading to defects and reduced yield.
Innovation Solution
Incorporation of a mark pattern in the landing wiring that overlaps with the through via, allowing for verification of via hole openness and enhancing mechanical bonding and electrical conductivity between the via and the landing wiring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through via holes are formed during manufacturing, then interconnection between semiconductor chips is achieved, but incomplete openings occur leading to defects and reduced reliability
Solution Approach 1:
The mark pattern is formed in advance within the landing wiring before the through via is created. This preliminary placement of the mark pattern allows for subsequent verification that the through via has been properly formed and opened, enabling detection of manufacturing defects before they propagate through the device.
Solution Approach 2:
The mark pattern serves as a visual or detectable indicator that provides feedback on the formation status of the through via. By observing whether the mark pattern is visible or accessible through the via opening, manufacturers can verify proper via formation and identify incomplete openings, enabling quality control and process improvement.
2Reliability
If through via holes are formed to penetrate substrates, then electrical interconnection is established, but mechanical bonding strength is reduced due to substrate penetration
Solution Approach 1:
The landing wiring acts as an intermediary element that receives the through via and provides both electrical connection and mechanical support. The mark pattern within the landing wiring further serves as an intermediary indicator that verifies the via's proper formation and contact, ensuring both electrical functionality and structural integrity without requiring the via to directly bond substrates.
Data Source
AI summary
An image sensor includes a first semiconductor chip including a first substrate, a first interlayer insulating layer covering the first substrate, and first wirings and a first landing wiring disposed in the first interlayer insulating layer, a first through via penetrating the first substrate and contacting the first landing wiring, and at least one first mark pattern disposed in the first landing wiring and overlapping the first through via.